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309 lines
10 KiB
ArmAsm
309 lines
10 KiB
ArmAsm
;/***************************************************************************/
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; @file startup_stm32c031xx.s for IAR ARM assembler
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; @brief CMSIS Cortex-M4F Core Device Startup File for stm32c031xx
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; @version CMSIS 5.9.0
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; @date 1 Feb 2023
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;
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; Modified by Quantum Leaps:
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; - Added relocating of the Vector Table to free up the 256B region at 0x0
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; for NULL-pointer protection by the MPU.
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; - Modified all exception handlers to branch to assert_failed()
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; instead of locking up the CPU inside an endless loop.
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; *
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; * @description
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; * Created from the CMSIS template for the specified device
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; * Quantum Leaps, www.state-machine.com
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; *
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MODULE ?cstartup
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; Forward declaration of sections.
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SECTION CSTACK:DATA:NOROOT(3)
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SECTION .intvec:CODE:NOROOT(8)
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PUBLIC __vector_table
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PUBLIC __Vectors
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PUBLIC __Vectors_End
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PUBLIC __Vectors_Size
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;******************************************************************************
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; The vector table
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;
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DATA
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__vector_table
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DCD sfe(CSTACK)
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DCD Reset_Handler ; Reset Handler
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DCD NMI_Handler ; NMI Handler
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DCD HardFault_Handler ; Hard Fault Handler
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DCD Default_Handler ; Reserved
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DCD Default_Handler ; Reserved
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DCD Default_Handler ; Reserved
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DCD Default_Handler ; Reserved
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DCD Default_Handler ; Reserved
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DCD Default_Handler ; Reserved
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DCD Default_Handler ; Reserved
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DCD SVC_Handler ; SVCall handler
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DCD DebugMon_Handler ; Debug Monitor handler
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DCD Default_Handler ; Reserved
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DCD PendSV_Handler ; PendSV handler
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DCD SysTick_Handler ; SysTick handler
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; IRQ handlers...
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DCD WWDG_IRQHandler ; [ 0] Window Watchdog
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DCD Reserved1_IRQHandler ; [ 1] Reserved
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DCD RTC_IRQHandler ; [ 2] RTC through EXTI Line
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DCD FLASH_IRQHandler ; [ 3] FLASH
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DCD RCC_IRQHandler ; [ 4] RCC
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DCD EXTI0_1_IRQHandler ; [ 5] EXTI Line 0 and 1
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DCD EXTI2_3_IRQHandler ; [ 6] EXTI Line 2 and 3
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DCD EXTI4_15_IRQHandler ; [ 7] EXTI Line 4 to 15
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DCD Reserved8_IRQHandler ; [ 8] Reserved
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DCD DMA1_Channel1_IRQHandler ; [ 9] DMA1 Channel 1
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DCD DMA1_Channel2_3_IRQHandler ; [10] DMA1 Channel 2 and Channel 3
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DCD DMAMUX1_IRQHandler ; [11] DMAMUX
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DCD ADC1_IRQHandler ; [12] ADC1
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DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; [13] TIM1 Break, Update, Trigger and Commutation
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DCD TIM1_CC_IRQHandler ; [14] TIM1 Capture Compare
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DCD Reserved15_IRQHandler ; [15] Reserved
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DCD TIM3_IRQHandler ; [16] TIM3
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DCD Reserved17_IRQHandler ; [17] Reserved
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DCD Reserved18_IRQHandler ; [18] Reserved
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DCD TIM14_IRQHandler ; [19] TIM14
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DCD Reserved20_IRQHandler ; [20] Reserved
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DCD TIM16_IRQHandler ; [21] TIM16
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DCD TIM17_IRQHandler ; [22] TIM17
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DCD I2C1_IRQHandler ; [23] I2C1
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DCD Reserved24_IRQHandler ; [24] Reserved
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DCD SPI1_IRQHandler ; [25] SPI1
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DCD Reserved26_IRQHandler ; [26] Reserved
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DCD USART1_IRQHandler ; [27] USART1
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DCD USART2_IRQHandler ; [28] USART2
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DCD Reserved29_IRQHandler ; [29] Reserved
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DCD Reserved30_IRQHandler ; [30] Reserved
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DCD Reserved31_IRQHandler ; [31] Reserved
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__Vectors_End
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__Vectors EQU __vector_table
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__Vectors_Size EQU __Vectors_End - __Vectors
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;******************************************************************************
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; This is the code for exception handlers.
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;
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SECTION .text:CODE:REORDER:NOROOT(2)
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;******************************************************************************
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; This is the code that gets called when the CPU first starts execution
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; following a reset event.
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;
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PUBWEAK Reset_Handler
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EXTERN SystemInit
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EXTERN __iar_program_start
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EXTERN assert_failed
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Reset_Handler
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LDR r0,=SystemInit ; CMSIS system initialization
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BLX r0
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; pre-fill the CSTACK with 0xDEADBEEF...................
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LDR r0,=0xDEADBEEF
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MOV r1,r0
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LDR r2,=sfb(CSTACK)
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LDR r3,=sfe(CSTACK)
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Reset_stackInit_fill:
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STMIA r2!,{r0,r1}
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CMP r2,r3
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BLT.N Reset_stackInit_fill
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LDR r0,=__iar_program_start ; IAR startup code
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BLX r0
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; __iar_program_start calls the main() function, which should not return,
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; but just in case jump to assert_failed() if main returns.
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CPSID i ; disable all interrupts
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LDR r0,=str_EXIT
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MOVS r1,#1
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LDR r2,=sfe(CSTACK) ; re-set the SP in case of stack overflow
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MOV sp,r2
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LDR r2,=assert_failed
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BX r2
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str_EXIT
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DCB "EXIT"
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ALIGNROM 2
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;******************************************************************************
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PUBWEAK NMI_Handler
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NMI_Handler
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CPSID i ; disable all interrupts
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LDR r0,=str_NMI
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MOVS r1,#1
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LDR r2,=sfe(CSTACK) ; re-set the SP in case of stack overflow
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MOV sp,r2
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LDR r2,=assert_failed
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BX r2
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str_NMI
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DCB "NMI"
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ALIGNROM 2
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;******************************************************************************
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PUBWEAK HardFault_Handler
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HardFault_Handler
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CPSID i ; disable all interrupts
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LDR r0,=str_HardFault
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MOVS r1,#1
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LDR r2,=sfe(CSTACK) ; re-set the SP in case of stack overflow
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MOV sp,r2
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LDR r2,=assert_failed
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BX r2
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str_HardFault
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DCB "HardFault"
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ALIGNROM 2
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;******************************************************************************
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;
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; Weak non-fault handlers...
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;
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;******************************************************************************
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PUBWEAK SVC_Handler
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SVC_Handler
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CPSID i ; disable all interrupts
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LDR r0,=str_SVC
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MOVS r1,#1
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LDR r2,=sfe(CSTACK) ; re-set the SP in case of stack overflow
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MOV sp,r2
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LDR r2,=assert_failed
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BX r2
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str_SVC
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DCB "SVC"
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ALIGNROM 2
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;******************************************************************************
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PUBWEAK DebugMon_Handler
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DebugMon_Handler
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CPSID i ; disable all interrupts
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LDR r0,=str_DebugMon
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MOVS r1,#1
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LDR r2,=sfe(CSTACK) ; re-set the SP in case of stack overflow
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MOV sp,r2
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LDR r2,=assert_failed
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BX r2
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str_DebugMon
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DCB "DebugMon"
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ALIGNROM 2
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;******************************************************************************
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PUBWEAK PendSV_Handler
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PendSV_Handler
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CPSID i ; disable all interrupts
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LDR r0,=str_PendSV
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MOVS r1,#1
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LDR r2,=sfe(CSTACK) ; re-set the SP in case of stack overflow
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MOV sp,r2
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LDR r2,=assert_failed
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BX r2
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str_PendSV
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DCB "PendSV"
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ALIGNROM 2
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;******************************************************************************
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PUBWEAK SysTick_Handler
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SysTick_Handler
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CPSID i ; disable all interrupts
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LDR r0,=str_SysTick
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MOVS r1,#1
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LDR r2,=sfe(CSTACK) ; re-set the SP in case of stack overflow
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MOV sp,r2
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LDR r2,=assert_failed
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BX r2
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str_SysTick
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DCB "SysTick"
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ALIGNROM 2
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;******************************************************************************
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; Weak IRQ handlers...
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;
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PUBWEAK Default_Handler
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PUBWEAK WWDG_IRQHandler
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PUBWEAK RTC_IRQHandler
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PUBWEAK FLASH_IRQHandler
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PUBWEAK RCC_IRQHandler
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PUBWEAK EXTI0_1_IRQHandler
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PUBWEAK EXTI2_3_IRQHandler
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PUBWEAK EXTI4_15_IRQHandler
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PUBWEAK DMA1_Channel1_IRQHandler
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PUBWEAK DMA1_Channel2_3_IRQHandler
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PUBWEAK DMAMUX1_IRQHandler
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PUBWEAK ADC1_IRQHandler
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PUBWEAK TIM1_BRK_UP_TRG_COM_IRQHandler
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PUBWEAK TIM1_CC_IRQHandler
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PUBWEAK TIM3_IRQHandler
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PUBWEAK TIM14_IRQHandler
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PUBWEAK TIM16_IRQHandler
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PUBWEAK TIM17_IRQHandler
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PUBWEAK I2C1_IRQHandler
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PUBWEAK SPI1_IRQHandler
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PUBWEAK USART1_IRQHandler
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PUBWEAK USART2_IRQHandler
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PUBWEAK Reserved1_IRQHandler
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PUBWEAK Reserved8_IRQHandler
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PUBWEAK Reserved15_IRQHandler
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PUBWEAK Reserved17_IRQHandler
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PUBWEAK Reserved18_IRQHandler
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PUBWEAK Reserved20_IRQHandler
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PUBWEAK Reserved24_IRQHandler
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PUBWEAK Reserved26_IRQHandler
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PUBWEAK Reserved29_IRQHandler
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PUBWEAK Reserved30_IRQHandler
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PUBWEAK Reserved31_IRQHandler
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Default_Handler
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WWDG_IRQHandler
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RTC_IRQHandler
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FLASH_IRQHandler
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RCC_IRQHandler
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EXTI0_1_IRQHandler
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EXTI2_3_IRQHandler
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EXTI4_15_IRQHandler
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DMA1_Channel1_IRQHandler
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DMA1_Channel2_3_IRQHandler
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DMAMUX1_IRQHandler
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ADC1_IRQHandler
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TIM1_BRK_UP_TRG_COM_IRQHandler
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TIM1_CC_IRQHandler
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TIM3_IRQHandler
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TIM14_IRQHandler
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TIM16_IRQHandler
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TIM17_IRQHandler
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I2C1_IRQHandler
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SPI1_IRQHandler
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USART1_IRQHandler
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USART2_IRQHandler
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Reserved1_IRQHandler
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Reserved8_IRQHandler
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Reserved15_IRQHandler
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Reserved17_IRQHandler
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Reserved18_IRQHandler
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Reserved20_IRQHandler
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Reserved24_IRQHandler
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Reserved26_IRQHandler
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Reserved29_IRQHandler
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Reserved30_IRQHandler
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Reserved31_IRQHandler
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CPSID i ; disable all interrupts
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LDR r0,=str_Undefined
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MOVS r1,#1
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LDR r2,=sfe(CSTACK) ; re-set the SP in case of stack overflow
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MOV sp,r2
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LDR r2,=assert_failed
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BX r2
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str_Undefined
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DCB "Undefined"
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ALIGNROM 2
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END ; end of module
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