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History

MMS b99e29d97e 3.0.8		5 months ago
..
README.md	3.0.8	5 months ago
app.h	3.0.7	6 months ago
bsp.c	3.0.7	6 months ago
bsp.h	3.0.7	6 months ago
lesson.sct	3.0.7	6 months ago
lesson.uvoptx	3.0.7	6 months ago
lesson.uvprojx	3.0.7	6 months ago
main.c	3.0.7	6 months ago
periodic1.c	3.0.7	6 months ago
periodic4.c	3.0.7	6 months ago
qp_config.h	3.0.7	6 months ago
real-time.qm	3.0.7	6 months ago
sporadic2.c	3.0.7	6 months ago
sporadic3.c	3.0.7	6 months ago

README.md

Logic Analyzer Connection (CHx) to EK-TM4C123GXL board:

  J1     J3                                 J4     J2

+3.3V    VBUS                        CH4 -- PF2    GND -- GND
  PB5    GND                         CH8 -- PF3    PB2
  PB0    PD0 -- CH5                         PB3    P30
  PB1    PD1 -- CH6                         PC4    PF0
  PE4    PD2 -- CH7                         PC5    RST
  PE5    PD3                                PC6    PB7
  PB4    PE1                                PC7    PB6
  PA5    PE2                                PD6    PA4
  PA6    PE3                                PD7    PA3
  PA7    PF1 -- CH2                  CH1 -- PF4    PA2

Example Logic Analyzer Traces

Logic analyzer trace after pressing the button (non-preemptive QV kernel)

Logic analyzer trace after pressing the button (preemptive QK kernel)

Logic analyzer trace after pressing the button (preemptive FreeRTOS kernel)