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386 lines
14 KiB
C
386 lines
14 KiB
C
/*****************************************************************************
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* BSP for STM32 NUCLEO-F401RE with QP/C framework
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*****************************************************************************/
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#include "qpc.h" /* QP/C API */
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#include "bsp.h"
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#include "stm32f4xx.h" /* CMSIS-compliant header file for the MCU used */
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// add other drivers if necessary...
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Q_DEFINE_THIS_FILE // define this file for Q_ASSERT()
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// Local-scope defines -----------------------------------------------------
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// LED pins available on the board (just one user LED LD2--Green on PA.5)
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#define LD2_PIN 5U
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// external LED to be inserted between GND (short leg) and
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// D12 (longer leg) on the CN9 connector
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#define LD5_PIN 6U
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// Button pins available on the board (just one user Button B1 on PC.13)
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#define B1_PIN 13U
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#ifdef Q_SPY
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// QSpy source IDs
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static QSpyId const l_SysTick_Handler = { 0U };
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static QSTimeCtr QS_tickTime_;
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static QSTimeCtr QS_tickPeriod_;
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#endif
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/* Error/Assertions =======================================================*/
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/* assertion-handling function */
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Q_NORETURN Q_onAssert(char const *module, int id) {
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// NOTE: this implementation of the error handler is intended only
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// for debugging and MUST be changed for deployment of the application
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// (assuming that you ship your production code with assertions enabled).
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Q_UNUSED_PAR(module);
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Q_UNUSED_PAR(id);
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QS_ASSERTION(module, id, 10000U); // report assertion to QS
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#ifndef NDEBUG
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GPIOA->BSRR = (1U << LD5_PIN); // turn LD5 on
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for (;;) { // for debugging, hang on in an endless loop...
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}
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#else
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NVIC_SystemReset();
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for (;;) { // explicitly "no-return"
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}
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#endif
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}
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//............................................................................
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// assert-handling function called by exception handlers in the startup code
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void assert_failed(char const * const module, int_t const id); // prototype
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void assert_failed(char const * const module, int_t const id) {
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Q_onAssert(module, id);
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}
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// ISRs ======================================================================
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void SysTick_Handler(void) {
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QTIMEEVT_TICK_X(0U, &l_SysTick_Handler); // time events at rate 0
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// Perform the debouncing of buttons. The algorithm for debouncing
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// adapted from the book "Embedded Systems Dictionary" by Jack Ganssle
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// and Michael Barr, page 71.
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static struct {
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uint32_t depressed;
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uint32_t previous;
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} buttons = { 0U, 0U };
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uint32_t current = ~GPIOC->IDR; // read Port C with state of Button B1
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uint32_t tmp = buttons.depressed; // save the depressed buttons
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buttons.depressed |= (buttons.previous & current); // set depressed
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buttons.depressed &= (buttons.previous | current); // clear released
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buttons.previous = current; // update the history
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tmp ^= buttons.depressed; // changed debounced depressed
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current = buttons.depressed;
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if ((tmp & (1U << B1_PIN)) != 0U) { // debounced B1 state changed?
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if ((current & (1U << B1_PIN)) != 0U) { // is B1 depressed?
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/* post the "button-pressed" event from ISR */
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static QEvt const pressEvt = QEVT_INITIALIZER(BUTTON_PRESSED_SIG);
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QACTIVE_POST(AO_TimeBomb, &pressEvt, 0U);
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QS_BEGIN_ID(QS_USER, 0)
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QS_STR("SW1");
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QS_U8(1U, 1U);
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QS_END()
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}
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else { /* the button is released */
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/* post the "button-released" event from ISR */
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static QEvt const releaseEvt = QEVT_INITIALIZER(BUTTON_RELEASED_SIG);
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QACTIVE_POST(AO_TimeBomb, &releaseEvt, 0U);
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QS_BEGIN_ID(QS_USER, 0)
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QS_STR("SW2");
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QS_U8(1U, 0U);
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QS_END()
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}
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}
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#ifdef Q_SPY
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tmp = SysTick->CTRL; // clear CTRL_COUNTFLAG
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QS_tickTime_ += QS_tickPeriod_; // account for the clock rollover
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#endif
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QV_ARM_ERRATUM_838869();
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}
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#ifdef Q_SPY
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// ISR for receiving bytes from the QSPY Back-End
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// NOTE: This ISR is "QF-unaware" meaning that it does not interact with
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// the QF/QV and is not disabled. Such ISRs cannot post or publish events.
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void USART2_IRQHandler(void); // prototype
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void USART2_IRQHandler(void) { // used in QS-RX (kernel UNAWARE interrutp)
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// is RX register NOT empty?
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if ((USART2->SR & (1U << 5U)) != 0U) {
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uint32_t b = USART2->DR;
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QS_RX_PUT(b);
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}
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QV_ARM_ERRATUM_838869();
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}
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#endif // Q_SPY
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//............................................................................
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#ifdef QF_ON_CONTEXT_SW
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// NOTE: the context-switch callback is called with interrupts DISABLED
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void QF_onContextSw(QActive *prev, QActive *next) {
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QS_BEGIN_INCRIT(CONTEXT_SW, 0U) // in critical section!
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QS_OBJ(prev);
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QS_OBJ(next);
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QS_END_INCRIT()
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}
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#endif // QF_ON_CONTEXT_SW
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/* BSP functions ===========================================================*/
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void BSP_init(void) {
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// enable GPIOA clock port for the LED LD2
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RCC->AHB1ENR |= (1U << 0U);
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// NUCLEO-F401RE board has LED LD2 on GPIOA pin LD2_PIN
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// and external LED LD5 on GPIO LD5_PIN
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// set the LED pins as push-pull output, no pull-up, pull-down
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GPIOA->MODER &= ~((3U << 2U*LD2_PIN) | (3U << 2U*LD5_PIN));
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GPIOA->MODER |= ((1U << 2U*LD2_PIN) | (1U << 2U*LD5_PIN));
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GPIOA->OTYPER &= ~((1U << LD2_PIN) | (1U << LD5_PIN));
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GPIOA->OSPEEDR &= ~((3U << 2U*LD2_PIN) | (3U << 2U*LD5_PIN));
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GPIOA->OSPEEDR |= ((1U << 2U*LD2_PIN) | (1U << 2U*LD5_PIN));
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GPIOA->PUPDR &= ~((3U << 2U*LD2_PIN) | (3U << 2U*LD5_PIN));
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// enable GPIOC clock port for the Button B1
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RCC->AHB1ENR |= (1U << 2U);
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// configure Button B1 pin on GPIOC as input, no pull-up, pull-down
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GPIOC->MODER &= ~(3U << 2U*B1_PIN);
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GPIOC->PUPDR &= ~(3U << 2U*B1_PIN);
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// initialize the QS software tracing...
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if (!QS_INIT((void *)0)) {
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Q_ERROR();
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}
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// prodice the QS dictionaries...
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QS_OBJ_DICTIONARY(AO_TimeBomb);
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QS_SIG_DICTIONARY(BUTTON_PRESSED_SIG, (void *)0);
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QS_SIG_DICTIONARY(BUTTON_RELEASED_SIG, (void *)0);
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QS_SIG_DICTIONARY(BUTTON2_PRESSED_SIG, (void *)0);
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QS_SIG_DICTIONARY(BUTTON2_RELEASED_SIG, (void *)0);
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QS_SIG_DICTIONARY(TIMEOUT_SIG, (void *)0);
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// setup the QS filters...
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//QS_GLB_FILTER(QS_UA_RECORDS); /* all User records */
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//QS_GLB_FILTER(QS_SM_RECORDS); /* state machine records */
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QS_GLB_FILTER(QS_ALL_RECORDS); /* all QS records */
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QS_GLB_FILTER(-QS_QF_TICK); /* disable */
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}
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//............................................................................
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void QF_onStartup(void) {
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// set up the SysTick timer to fire at BSP_TICKS_PER_SEC rate
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SystemCoreClockUpdate();
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SysTick_Config(SystemCoreClock / BSP_TICKS_PER_SEC);
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// set priorities of ALL ISRs used in the system, see NOTE1
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NVIC_SetPriority(USART2_IRQn, 0U); // kernel UNAWARE interrupt
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NVIC_SetPriority(SysTick_IRQn, QF_AWARE_ISR_CMSIS_PRI + 1U);
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// ...
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// enable IRQs...
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#ifdef Q_SPY
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NVIC_EnableIRQ(USART2_IRQn); // UART2 interrupt used for QS-RX
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#endif
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// ...
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}
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//............................................................................
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void QF_onCleanup(void) {
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}
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//............................................................................
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void BSP_ledRedOn(void) {
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GPIOA->BSRR = (1U << LD2_PIN); // turn LD2 on
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QS_BEGIN_ID(QS_USER, 0)
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QS_STR("red");
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QS_U8(1U, 1U);
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QS_END()
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}
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//............................................................................
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void BSP_ledRedOff(void) {
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GPIOA->BSRR = (1U << (LD2_PIN + 16U)); // turn LD2 off
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QS_BEGIN_ID(QS_USER, 0)
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QS_STR("red");
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QS_U8(1U, 0U);
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QS_END()
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}
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//............................................................................
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void BSP_ledBlueOn(void) {
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//GPIOA->BSRR = (1U << LD2_PIN); // turn LD2 on
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QS_BEGIN_ID(QS_USER, 0)
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QS_STR("blue");
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QS_U8(1U, 1U);
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QS_END()
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}
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//............................................................................
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void BSP_ledBlueOff(void) {
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//GPIOA->BSRR = (1U << (LD2_PIN + 16U)); // turn LD2 off
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QS_BEGIN_ID(QS_USER, 0)
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QS_STR("blue");
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QS_U8(1U, 0U);
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QS_END()
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}
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//............................................................................
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void BSP_ledGreenOn(void) {
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GPIOA->BSRR = (1U << LD5_PIN); // turn LD5 on
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QS_BEGIN_ID(QS_USER, 0)
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QS_STR("green");
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QS_U8(1U, 1U);
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QS_END()
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}
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//............................................................................
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void BSP_ledGreenOff(void) {
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GPIOA->BSRR = (1U << (LD5_PIN + 16U)); // turn LD5 off
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QS_BEGIN_ID(QS_USER, 0)
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QS_STR("green");
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QS_U8(1U, 0U);
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QS_END()
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}
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//............................................................................
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void QV_onIdle(void) { // CATION: called with interrupts DISABLED
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// toggle an LED on and then off (not enough LEDs, see NOTE02)
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//GPIOA->BSRR = (1U << LD2_PIN); // turn LED[n] on
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//GPIOA->BSRR = (1U << (LD2_PIN + 16U)); // turn LED[n] off
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#ifdef Q_SPY
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// interrupts still disabled
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QS_rxParse(); // parse all the received bytes
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QF_INT_ENABLE();
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QF_CRIT_EXIT_NOP();
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if ((USART2->SR & (1U << 7U)) != 0U) { // is TXE empty?
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QF_INT_DISABLE();
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uint16_t b = QS_getByte();
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QF_INT_ENABLE();
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if (b != QS_EOD) { // not End-Of-Data?
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USART2->DR = b; // put into the DR register
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}
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}
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#elif defined NDEBUG
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// Put the CPU and peripherals to the low-power mode.
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// you might need to customize the clock management for your application,
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// see the datasheet for your particular Cortex-M MCU.
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//
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QV_CPU_SLEEP(); // atomically go to sleep and enable interrupts
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#else
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QF_INT_ENABLE(); // just enable interrupts
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#endif
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}
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//============================================================================
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// QS callbacks...
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#ifdef Q_SPY
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//............................................................................
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#define __DIV(__PCLK, __BAUD) (((__PCLK / 4) *25)/(__BAUD))
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#define __DIVMANT(__PCLK, __BAUD) (__DIV(__PCLK, __BAUD)/100)
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#define __DIVFRAQ(__PCLK, __BAUD) \
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(((__DIV(__PCLK, __BAUD) - (__DIVMANT(__PCLK, __BAUD) * 100)) \
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* 16 + 50) / 100)
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#define __USART_BRR(__PCLK, __BAUD) \
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((__DIVMANT(__PCLK, __BAUD) << 4)|(__DIVFRAQ(__PCLK, __BAUD) & 0x0F))
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// USART2 pins PA.2 and PA.3
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#define USART2_TX_PIN 2U
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#define USART2_RX_PIN 3U
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//............................................................................
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uint8_t QS_onStartup(void const *arg) {
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Q_UNUSED_PAR(arg);
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static uint8_t qsTxBuf[2*1024]; // buffer for QS-TX channel
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QS_initBuf(qsTxBuf, sizeof(qsTxBuf));
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static uint8_t qsRxBuf[100]; // buffer for QS-RX channel
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QS_rxInitBuf(qsRxBuf, sizeof(qsRxBuf));
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// enable peripheral clock for USART2
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RCC->AHB1ENR |= ( 1U << 0U); // Enable GPIOA clock
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RCC->APB1ENR |= ( 1U << 17U); // Enable USART#2 clock
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// Configure PA3 to USART2_RX, PA2 to USART2_TX
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GPIOA->AFR[0] &= ~((15U << 4U*USART2_RX_PIN) | (15U << 4U*USART2_TX_PIN));
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GPIOA->AFR[0] |= (( 7U << 4U*USART2_RX_PIN) | ( 7U << 4U*USART2_TX_PIN));
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GPIOA->MODER &= ~(( 3U << 2U*USART2_RX_PIN) | ( 3U << 2U*USART2_TX_PIN));
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GPIOA->MODER |= (( 2U << 2U*USART2_RX_PIN) | ( 2U << 2U*USART2_TX_PIN));
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USART2->BRR = __USART_BRR(SystemCoreClock, 115200U); // baud rate
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USART2->CR3 = 0x0000U; // no flow control
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USART2->CR2 = 0x0000U; // 1 stop bit
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USART2->CR1 = ((1U << 2U) | // enable RX
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(1U << 3U) | // enable TX
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(1U << 5U) | // enable RX interrupt
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(0U << 12U) | // 8 data bits
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(0U << 28U) | // 8 data bits
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(1U << 13U)); // enable USART
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QS_tickPeriod_ = SystemCoreClock / BSP_TICKS_PER_SEC;
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QS_tickTime_ = QS_tickPeriod_; // to start the timestamp at zero
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return 1U; // return success
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}
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//............................................................................
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void QS_onCleanup(void) {
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}
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//............................................................................
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QSTimeCtr QS_onGetTime(void) { // NOTE: invoked with interrupts DISABLED
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if ((SysTick->CTRL & 0x00010000U) == 0U) { // COUNT no set?
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return QS_tickTime_ - (QSTimeCtr)SysTick->VAL;
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}
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else { // the rollover occured, but the SysTick_ISR did not run yet
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return QS_tickTime_ + QS_tickPeriod_ - (QSTimeCtr)SysTick->VAL;
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}
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}
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//............................................................................
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void QS_onFlush(void) {
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for (;;) {
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QF_INT_DISABLE();
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uint16_t b = QS_getByte();
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if (b != QS_EOD) {
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while ((USART2->SR & (1U << 7U)) == 0U) { // while TXE not empty
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QF_INT_ENABLE();
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QF_CRIT_EXIT_NOP();
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QF_INT_DISABLE();
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}
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USART2->DR = b; // put into the DR register
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QF_INT_ENABLE();
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}
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else {
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QF_INT_ENABLE();
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break;
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}
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}
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}
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//............................................................................
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//! callback function to reset the target (to be implemented in the BSP)
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void QS_onReset(void) {
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NVIC_SystemReset();
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}
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//............................................................................
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//! callback function to execute a user command
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void QS_onCommand(uint8_t cmdId,
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uint32_t param1, uint32_t param2, uint32_t param3)
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{
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Q_UNUSED_PAR(cmdId);
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Q_UNUSED_PAR(param1);
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Q_UNUSED_PAR(param2);
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Q_UNUSED_PAR(param3);
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}
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#endif // Q_SPY
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//----------------------------------------------------------------------------
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