2.1
### uVision Project, (C) Keil Software
dbg 0x4 ARM-ADS 6230000::V6.23::ARMCLANG 1 STM32C031C6Tx STMicroelectronics Keil.STM32C0xx_DFP.1.0.0 https://www.keil.com/pack/ IRAM(0x20000000,0x00003000) IROM(0x08000000,0x00008000) CPUTYPE("Cortex-M0+") CLOCK(12000000) ELITTLE UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32C0x_32 -FS08000000 -FL08000 -FP0($$Device:STM32C031C6Tx$CMSIS\Flash\STM32C0x_32.FLM)) 0 $$Device:STM32C031C6Tx$Drivers\CMSIS\Device\ST\STM32C0xx\Include\stm32c0xx.h $$Device:STM32C031C6Tx$CMSIS\SVD\STM32C031.svd 0 0 0 0 0 0 1 .\dbg\ lesson 1 0 0 1 1 .\dbg\ 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 3 1 SARMCM3.DLL -REMAP-MPU DARMCM1.DLL -pCM0+ SARMCM3.DLL -MPU TARMCM1.DLL -pCM0+ 1 0 0 0 16 1 0 0 1 1 -1 1 BIN\UL2CM3.DLL 0 0 1 1 1 1 1 1 1 0 1 1 0 1 1 0 0 1 1 1 1 1 1 1 1 1 0 0 "Cortex-M0+" 0 0 0 1 1 0 0 0 0 0 0 0 0 8 0 0 0 0 3 3 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0x0 0x0 0 0x0 0x0 0 0x0 0x0 0 0x0 0x0 0 0x0 0x0 0 0x0 0x0 0 0x20000000 0x3000 1 0x8000000 0x8000 0 0x0 0x0 1 0x0 0x0 1 0x0 0x0 1 0x0 0x0 1 0x8000000 0x8000 1 0x0 0x0 0 0x0 0x0 0 0x0 0x0 0 0x0 0x0 0 0x20000000 0x3000 0 0x0 0x0 1 1 0 0 1 0 0 0 0 0 3 0 0 0 0 0 5 3 1 1 0 0 0 -Wno-declaration-after-statement .;..\qpc\include;..\qpc\ports\arm-cm\qv\armclang;..\nucleo-c031c6;..\CMSIS\Include 1 0 0 0 0 0 0 0 0 1 Stack_Size=2048,Heap_Size=0 0 0 0 0 1 0 0x00000000 0x20000000 lesson.sct Source main.c 1 .\main.c bsp.c 1 .\bsp.c bsp.h 5 .\bsp.h app.h 5 .\app.h periodic1.c 1 .\periodic1.c periodic4.c 1 .\periodic4.c qp_config.h 5 .\qp_config.h sporadic2.c 1 .\sporadic2.c sporadic3.c 1 .\sporadic3.c nucleo-c031c6 README.txt 5 ..\nucleo-c031c6\README.txt stm32c0xx.h 5 ..\nucleo-c031c6\stm32c0xx.h stm32c031xx.h 5 ..\nucleo-c031c6\stm32c031xx.h system_stm32c0xx.c 1 ..\nucleo-c031c6\system_stm32c0xx.c system_stm32c0xx.h 5 ..\nucleo-c031c6\system_stm32c0xx.h startup_stm32c031xx.s 2 ..\nucleo-c031c6\arm\startup_stm32c031xx.s CMSIS cmsis_armclang.h 5 ..\CMSIS\Include\cmsis_armclang.h cmsis_compiler.h 5 ..\CMSIS\Include\cmsis_compiler.h cmsis_version.h 5 ..\CMSIS\Include\cmsis_version.h core_cm0plus.h 5 ..\CMSIS\Include\core_cm0plus.h qpc-qv qep_hsm.c 1 ..\qpc\src\qf\qep_hsm.c qep_msm.c 1 ..\qpc\src\qf\qep_msm.c qf_act.c 1 ..\qpc\src\qf\qf_act.c qf_actq.c 1 ..\qpc\src\qf\qf_actq.c qf_defer.c 1 ..\qpc\src\qf\qf_defer.c qf_dyn.c 1 ..\qpc\src\qf\qf_dyn.c qf_mem.c 1 ..\qpc\src\qf\qf_mem.c qf_ps.c 1 ..\qpc\src\qf\qf_ps.c qf_qact.c 1 ..\qpc\src\qf\qf_qact.c qf_qmact.c 1 ..\qpc\src\qf\qf_qmact.c qf_qeq.c 1 ..\qpc\src\qf\qf_qeq.c qf_time.c 1 ..\qpc\src\qf\qf_time.c qv.c 1 ..\qpc\src\qv\qv.c qp_port.h 5 ..\qpc\ports\arm-cm\qv\armclang\qp_port.h qs_port.h 5 ..\qpc\ports\arm-cm\qv\armclang\qs_port.h qv_port.c 1 ..\qpc\ports\arm-cm\qv\armclang\qv_port.c RTE\Device\TM4C123GH6PM\startup_TM4C123.s RTE\Device\TM4C123GH6PM\system_TM4C123.c lesson 1