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/*
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* dmd20.h
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*
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* Copyright (c) 1997-2008 ETEL SA. All Rights Reserved.
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*
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* This software is the confidential and proprietary informatione of ETEL SA
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* ("Confidential Information"). You shall not disclose such Confidential
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* Information and shall use it only in accordance with the terms of the
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* license agreement you entered into with ETEL.
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*
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* This software is provided "AS IS," without a warranty of any kind. ALL
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* EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND WARRANTIES, INCLUDING ANY
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* IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR
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* NON-INFRINGEMENT, ARE HEREBY EXCLUDED. ETEL AND ITS LICENSORS SHALL NOT BE
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* LIABLE FOR ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, MODIFYING
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* OR DISTRIBUTING THE SOFTWARE OR ITS DERIVATIVES. IN NO EVENT WILL ETEL OR ITS
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* LICENSORS BE LIABLE FOR ANY LOST REVENUE, PROFIT OR DATA, OR FOR DIRECT,
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* INDIRECT, SPECIAL, CONSEQUENTIAL, INCIDENTAL OR PUNITIVE DAMAGES, HOWEVER
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* CAUSED AND REGARDLESS OF THE THEORY OF LIABILITY, ARISING OUT OF THE USE OF
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* OR INABILITY TO USE SOFTWARE, EVEN IF ETEL HAS BEEN ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGES.
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*
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* This software is not designed or intended for use in on-line control of
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* aircraft, air traffic, aircraft navigation or aircraft communications; or in
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* the design, construction, operation or maintenance of any nuclear
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* facility. Licensee represents and warrants that it will not use or
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* redistribute the Software for such purposes.
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*
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*/
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/**
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* This header file contains public declaration for drive meta-data library.\n
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* This library allows access to the definitions of all ETEL drives'versions.\n
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* This library is only a pool of datas.\n
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* No access is made to the drive itself.\n
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* The available datas are, for example, the list of all versions of a product,
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* the number of registers of a product, the minimum and maximum values of a
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* register, etc.\n
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* This library is conformed to POSIX 1003.1c, and has been ported on the following OS:
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* @li @c WIN32
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* @li @c WIN32 RTX
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* @li @c QNX4
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* @li @c QNX6
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* @li @c LINUX 2.4
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* @li @c LINUX 2.6
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* @li @c XENOMAI
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* @li @c LYNXOS
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* @li @c SOLARIS SPARC 5
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* @li @c VXWORKS 5.4
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* @file dmd20.h
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*/
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#ifndef _DMD20_H
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#define _DMD20_H
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#ifdef __WIN32__ /* defined by Borland C++ Builder */
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#ifndef WIN32
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#define WIN32
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#endif
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#endif
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#ifdef __cplusplus
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#ifdef ETEL_OO_API /* defined by the user when he need the Object Oriented interface */
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#define DMD_OO_API
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#endif
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#endif
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/**
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* @defgroup DMDAll DMD All functions
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*/
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/*@{*/
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/*@}*/
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/**
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* @defgroup DMDCommands DMD Command data access functions
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*/
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/*@{*/
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/*@}*/
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/**
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* @defgroup DMDConvert DMD Conversion functions
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*/
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/*@{*/
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/*@}*/
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/**
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* @defgroup DMDEnums DMD Enumeration data access functions
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*/
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/*@{*/
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/*@}*/
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/**
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* @defgroup DMDErrorsAndWarnings DMD Errors and warnings
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*/
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/*@{*/
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/*@}*/
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/**
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* @defgroup DMDObjectHandlingFunctions DMD Object handling functions
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*/
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/*@{*/
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/*@}*/
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/**
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* @defgroup DMDProduct DMD Product data access functions
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*/
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/*@{*/
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/*@}*/
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/**
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* @defgroup DMDRegister DMD Register data access functions
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*/
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/*@{*/
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/*@}*/
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/**
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* @defgroup DMDUtils DMD Utilities functions
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*/
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/*@{*/
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/*@}*/
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**********************************************************************************************************/
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/*- LIBRARIES */
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/**********************************************************************************************************/
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/*----------------------------------------------------------------------------------*/
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/* BYTE ORDER */
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/*----------------------------------------------------------------------------------*/
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#ifndef __BYTE_ORDER
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/*------------------------------*/
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/* Windows Byte order */
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#if defined WIN32
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#define __LITTLE_ENDIAN 1234
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#define __BIG_ENDIAN 4321
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#define __BYTE_ORDER __LITTLE_ENDIAN /* define byte order for INTEL processor */
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#endif /*WIN32*/
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/*------------------------------*/
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/* QNX4 Byte order */
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#if defined WIN32 || defined QNX4
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#define __LITTLE_ENDIAN 1234
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#define __BIG_ENDIAN 4321
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#define __BYTE_ORDER __LITTLE_ENDIAN /* define byte order for INTEL processor */
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#endif /*QNX4*/
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/*------------------------------*/
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/* POSIX SOLARIS Byte order */
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#if defined POSIX && defined SOLARIS
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#define __LITTLE_ENDIAN 1234
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#define __BIG_ENDIAN 4321
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#ifdef _BIG_ENDIAN
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#define __BYTE_ORDER __BIG_ENDIAN /* define byte order for SPARC processor */
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#else
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#define __BYTE_ORDER __LITTLE_ENDIAN /* define byte order for SPARC processor */
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#endif
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#endif /*SOLARIS*/
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/*------------------------------*/
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/* POSIX LINUX Byte order */
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#if defined POSIX && defined LINUX
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#include <endian.h>
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#endif /*LINUX*/
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/*------------------------------*/
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/* POSIX XENOMAI Byte order */
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#if defined POSIX && defined XENOMAI
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#include <endian.h>
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#endif /*XENOMAI*/
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/*------------------------------*/
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/* POSIX QNX6 Byte order */
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#if defined POSIX && defined QNX6
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#define __LITTLE_ENDIAN 1234
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#define __BIG_ENDIAN 4321
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#ifdef __BIGENDIAN__
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#define __BYTE_ORDER __BIG_ENDIAN /* define byte order for SPARC processor */
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#else
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#define __BYTE_ORDER __LITTLE_ENDIAN /* define byte order for SPARC processor */
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#endif
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#endif /*QNX6*/
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/*------------------------------*/
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/* VXWORKS Byte order */
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#ifdef VXWORKS
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#define __LITTLE_ENDIAN _LITTLE_ENDIAN
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#define __BIG_ENDIAN _BIG_ENDIAN
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#define __BYTE_ORDER _BYTE_ORDER
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#endif /*VXWORKS*/
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#endif /*BYTE_ORDER*/
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/*----------------------*/
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/* common libraries */
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#include <time.h>
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#include <limits.h>
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/**********************************************************************************************************/
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/*- LITTERALS */
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/**********************************************************************************************************/
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/*------------------------------------------------------------------------------
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* true/false boolean values
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*-----------------------------------------------------------------------------*/
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#ifndef FALSE
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#define FALSE (unsigned char)0
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#endif
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#ifndef TRUE
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#define TRUE (unsigned char)1
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#endif
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/*------------------------------------------------------------------------------
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* error codes - c
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*-----------------------------------------------------------------------------*/
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#ifndef DMD_OO_API
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#define DMD_EBADEXTVER -419 /**< an extention card with an incompatible version has been specified */
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#define DMD_EBADDRVVER -418 /**< a drive with an incompatible version has been specified */
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#define DMD_EBADEXTPROD -417 /**< an unknown extention card product has been specified */
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#define DMD_EBADDRVPROD -416 /**< an unknown drive product has been specified */
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#define DMD_EBADPARAM -415 /**< one of the parameter is not valid */
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#define DMD_ESYSTEM -414 /**< some system resource return an error */
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#define DMD_EOBSOLETE -402 /**< function is obsolete */
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#endif /* DMD_OO_API */
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/*------------------------------------------------------------------------------
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* text query constants
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*-----------------------------------------------------------------------------*/
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#ifndef DMD_OO_API
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#define DMD_TEXT_MNEMONIC 1 /* mnemonic */
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#define DMD_TEXT_SHORT 2 /* short text description */
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#endif /* DMD_OO_API */
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/*------------------------------------------------------------------------------
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* drive special user variables
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*-----------------------------------------------------------------------------*/
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#ifndef DMD_OO_API
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#define DMD_USR_ACC 0xFFFF /* special user data - accumulator */
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#define DMD_VAR_INDIRECT 0xFFFE /* indirect register access */
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#endif /* DMD_OO_API */
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/*------------------------------------------------------------------------------
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* special product number
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*-----------------------------------------------------------------------------*/
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#ifndef DMD_OO_API
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#define DMD_PRODUCT_ANY (-1) /* special product number - any */
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#define DMD_PRODUCT_ANY_DSC (-1) /* special product number - any Simulate a DSC2P*/
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#define DMD_PRODUCT_ANY_ACCURET (-2) /* special product number - any Simulate a AccurET*/
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#endif /* DMD_OO_API */
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/*------------------------------------------------------------------------------
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* release status
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*-----------------------------------------------------------------------------*/
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#ifndef DMD_OO_API
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#define DMD_MICRO_ALPHA 0x00 /* base number for alpha releases */
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#define DMD_MICRO_BETA 0x40 /* base number for beta releases */
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#define DMD_MICRO_FINAL 0x80 /* base number for final releases */
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#endif /* DMD_OO_API */
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/*The enum values are now freezed
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-ETELSQL-
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SELECT subquery FROM prepareEnums
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ORDER BY code;
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-/ETELSQL-
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*/
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/*------------------------------------------------------------------------------
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* some maximum values
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*-----------------------------------------------------------------------------*/
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#ifndef DMD_OO_API
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#define DMD_TYPES 128 /* no more than 128 types now */
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/* If you change this value, change WHERE clause in dmdCode, tableAllEnumGroups AND
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dmdlocal.t _dmd_enum_grps[][];*/
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#define DMD_ENUMS 256 /* no more than 256 enums now */
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#define DMD_COMMANDS 1280 /* no more than 1280 commands now */
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#define DMD_CONVS 256 /* no more than 256 conversions now */
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#endif /* DMD_OO_API */
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/*------------------------------------------------------------------------------
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* ebl baud rates - c
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*-----------------------------------------------------------------------------*/
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#ifndef DMD_OO_API
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#define DMD_BAUDRATE_DEFAULT 0 /* default baud rate */
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#define DMD_BAUDRATE_B_9600 9600 /* 9600 bauds */
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#define DMD_BAUDRATE_B_19200 19200 /* 19200 bauds */
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#define DMD_BAUDRATE_B_38400 38400 /* 38400 bauds */
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#define DMD_BAUDRATE_B_57600 57600 /* 57600 bauds */
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#define DMD_BAUDRATE_B_115200 115200 /* 115200 bauds */
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#endif /* DMD_OO_API */
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/*------------------------------------------------------------------------------
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* display modes - c
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*-----------------------------------------------------------------------------*/
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#ifndef DMD_OO_API
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#define DMD_DISPLAY_NORMAL 1 /* normal informations */
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#define DMD_DISPLAY_TEMPERATURE 2 /* drive temperature */
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#define DMD_DISPLAY_ENCODER 4 /* analog encoder signals */
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#define DMD_DISPLAY_SEQUENCE 8 /* sequence line number */
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#define DMD_DISPLAY_X_BOARD 16 /* extension board */
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#endif /* DMD_OO_API */
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/*------------------------------------------------------------------------------
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* drive error codes - c
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*-----------------------------------------------------------------------------*/
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#ifndef DMD_OO_API
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#define DMD_EDRV_SAVE_OPERATION 1 /* save operation error */
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#define DMD_EDRV_OVER_CURRENT_1 2 /* over current 1 */
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#define DMD_EDRV_OVER_CURRENT_2 3 /* over current 2 */
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#define DMD_EDRV_I2T_OVER_CURRENT 4 /* i2t over current */
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#define DMD_EDRV_OVER_TEMPERATURE 5 /* over temperature */
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#define DMD_EDRV_OVER_VOLTAGE 6 /* over voltage error */
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#define DMD_EDRV_POWER_SUPPLY_INRUSH 7 /* inrush power supply error */
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#define DMD_EDRV_5V_UNDER_VOLTAGE 8
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#define DMD_EDRV_UNDER_VOLTAGE 9
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#define DMD_EDRV_OVER_OFFSET 10
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#define DMD_EDRV_ENCODER_AMPLITUDE 20 /* encoder amplitude error */
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#define DMD_EDRV_ENCODER_POSITION_LOST 21 /* encoder position lost */
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#define DMD_EDRV_UC_SYNCHRO 22 /* uc synchro error */
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#define DMD_EDRV_TRACKING_ERROR 23 /* tracking error */
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#define DMD_EDRV_OVER_SPEED 24 /* over speed error */
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#define DMD_EDRV_POWER_ON 26 /* power on error */
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#define DMD_EDRV_MOTOR_OVER_TEMP 29 /* motor over temperature */
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#define DMD_EDRV_LIMIT_SWITCH 30 /* limit switch reached */
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#define DMD_EDRV_LVDT_ERROR 31 /* LVDT error */
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#define DMD_EDRV_LVDT_NOT_PRESENT 32 /* LVDT not present */
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#define DMD_EDRV_LVDT_ADC_ERROR 33 /* LVDT ADC out */
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#define DMD_EDRV_F3_FUSE 34 /* F3 fuse dead */
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#define DMD_EDRV_F7_FUSE 35 /* F7 fuse dead */
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#define DMD_EDRV_BAD_SEQ_LABEL 36 /* sequence label number */
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#define DMD_EDRV_BAD_SEQ_LINE 37 /* sequence line number */
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#define DMD_EDRV_BAD_REG_IDX 38 /* register number */
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#define DMD_EDRV_STACK_OVERFLOW 39 /* stack overflow */
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#define DMD_EDRV_ETB_FRAMING 46 /* EB framing error */
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#define DMD_EDRV_ETB_OVERRUN 47 /* EB overrun */
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#define DMD_EDRV_ETB_CHECKSUM 48 /* EB checksum error */
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#define DMD_EDRV_ETB_SAME_AXIS 49 /* EB same axis error */
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#define DMD_EDRV_ETB_UNKNOWN_MESSAGE 50 /* EB unknown message */
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#define DMD_EDRV_ETB_DAISY_CHAIN 51 /* EB daisy chain error */
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#define DMD_EDRV_ETB_NO_SLAVES 52 /* EB no slaves */
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#define DMD_EDRV_ETB_OTHER_AXIS 53 /* EB other axis error */
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#define DMD_EDRV_ETB_SELF_TEST 54 /* EB self test error */
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#define DMD_EDRV_ETB_CHARACTER_LOST 55 /* EB character lost */
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#define DMD_EDRV_ETB_TIMEOUT 56 /* EB timeout */
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#define DMD_EDRV_HOMING_SWITCH_PRESENT 60
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#define DMD_EDRV_MULTIPLE_INDEX 61 /* multiple index error */
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#define DMD_EDRV_SINGLE_INDEX 62 /* single index error */
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#define DMD_EDRV_SYNCHRO_START 63 /* synchro start error */
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#define DMD_EDRV_X65 65
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#define DMD_EDRV_MASTER_POWER_OFF 67
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#define DMD_EDRV_ETB_NO_MASTER 71 /* EB no master */
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#define DMD_EDRV_EBL_FRAMING 80 /* EBL framing error */
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#define DMD_EDRV_EBL_OVERRUN 81 /* EBL overrun */
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#define DMD_EDRV_EBL_CHECKSUM 82 /* EBL checksum error */
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#define DMD_EDRV_EBL_UNKNOWN_MESSAGE 83 /* EBL unknown message */
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#define DMD_EDRV_EBL_INPUT_BUFFER 84 /* EBL input buffer error */
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#define DMD_EDRV_BAD_CRC 85
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#define DMD_EDRV_EBL_TIMEOUT_1 86 /* EBL timeout 1 */
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#define DMD_EDRV_EBL_TIMEOUT_2 87 /* EBL timeout 2 */
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#define DMD_EDRV_EBL_OTHER_AXIS 88 /* EBL other axis error */
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#define DMD_EDRV_MAC_OVERRUN 89 /* MACRO overrun */
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#define DMD_EDRV_MAC_VIOLATION 90 /* MACRO violation */
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#define DMD_EDRV_MAC_PARITY 91 /* MACRO parity error */
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#define DMD_EDRV_MAC_UNDERRUN 92 /* MACRO underrun */
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#define DMD_EDRV_MAC_SYNC_LOST 93 /* MACRO synchro lost */
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#define DMD_EDRV_MAC_AUX_2_CMD 94 /* MACRO aux 2 cmd error */
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#define DMD_EDRV_MAC_AUX_2 95 /* MACRO aux 2 error */
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#define DMD_EDRV_MAC_AUX_3 96 /* MACRO aux 3 error */
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#define DMD_EDRV_MAC_AUX_4 97 /* MACRO aux 4 error */
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#define DMD_EDRV_X100 100
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#define DMD_EDRV_X101 101
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#define DMD_EDRV_X102 102
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#define DMD_EDRV_X103 103
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#define DMD_EDRV_X104 104
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#define DMD_EDRV_X105 105
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#define DMD_EDRV_X106 106
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#define DMD_EDRV_X107 107
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#define DMD_EDRV_X108 108
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#define DMD_EDRV_X109 109
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#define DMD_EDRV_X110 110
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#define DMD_EDRV_X111 111
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#define DMD_EDRV_X112 112
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#define DMD_EDRV_X113 113
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#define DMD_EDRV_X114 114
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#define DMD_EDRV_X115 115
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#define DMD_EDRV_X116 116
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#define DMD_EDRV_BAD_GANTRY_CONF 117
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#define DMD_EDRV_GANTRY_OTHER_AXIS_ERROR 118
|
|
|
#define DMD_EDRV_GANTRY_TRACKING_ERROR 119
|
|
|
#define DMD_EDRV_HARD_OVER_CURRENT 130 /* hardware overcurrent */
|
|
|
#define DMD_EDRV_WD_CURRENT_UC 140 /* current uc watchdog error */
|
|
|
#define DMD_EDRV_WD_POSITION_FPGA 141 /* position FPGA watchdog */
|
|
|
#define DMD_EDRV_WD_POSITION_UC 142 /* position uc watchdog error */
|
|
|
#define DMD_EDRV_WD_CURRENT_AD 143 /* current A/D watchdog */
|
|
|
#define DMD_EDRV_WD_QUARTZ 144 /* quartz watchdog */
|
|
|
#define DMD_EDRV_INIT_MOTOR_1 150 /* motor initialisation error 1 */
|
|
|
#define DMD_EDRV_INIT_MOTOR_2 151 /* motor initialisation error 2 */
|
|
|
#define DMD_EDRV_INIT_MOTOR_DISABLED 152
|
|
|
#define DMD_EDRV_BAD_SOFTWARE 176 /* bad software */
|
|
|
#define DMD_EDRV_SAV_COMMAND 190
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* status of enable input - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_ENABLE_INPUT_REQUIRED 0 /* required */
|
|
|
#define DMD_ENABLE_INPUT_NOT_USED 125 /* not used */
|
|
|
#define DMD_ENABLE_INPUT_X135 135 /* enable use of K110, K111, K112 */
|
|
|
#define DMD_ENABLE_INPUT_AUTO 170 /* automatic */
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* kind of encoder - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_ENCODER_ANALOG 0 /* analog encoder */
|
|
|
#define DMD_ENCODER_TTL 1 /* TTL encoder */
|
|
|
#define DMD_ENCODER_HALL 2 /* HALL encoder */
|
|
|
#define DMD_ENCODER_LVDT 3 /* LVDT encoder */
|
|
|
#define DMD_ENCODER_ANALOG_AND_MACRO 100 /* analog encoder with MACRO bus */
|
|
|
#define DMD_ENCODER_TTL_AND_MACRO 101 /* TTL encoder with MACRO bus */
|
|
|
#define DMD_ENCODER_UNCHECKED_ANALOG_AND 102 /* unchecked analog encoder with MACRO bus */
|
|
|
#define DMD_ENCODER_HALL_AND_MACRO 103 /* HALL encoder with MACRO bus */
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* mask of fuses not controlled - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_FUSE_CTRL_F3_DISABLED 1 /* F3 disabled */
|
|
|
#define DMD_FUSE_CTRL_F7_DISABLED 2 /* F7 disabled */
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* usage of limit/home switch - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_SWITCH_LIMIT_ENABLED 1 /* limit switch enabled */
|
|
|
#define DMD_SWITCH_HOME_INVERTED 2 /* home switch inverted */
|
|
|
#define DMD_SWITCH_HOME_ENABLED 128 /* home switch enabled */
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* homing modes - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_HOMING_NEGATIVE_MVT 1 /* negative movement */
|
|
|
#define DMD_HOMING_MECHANICAL 0 /* mechanical end stop */
|
|
|
#define DMD_HOMING_HOME_SW 2 /* home switch */
|
|
|
#define DMD_HOMING_LIMIT_SW 4 /* limit switch */
|
|
|
#define DMD_HOMING_HOME_SW_L 6 /* home switch w/limit */
|
|
|
#define DMD_HOMING_SINGLE_INDEX 8 /* single index */
|
|
|
#define DMD_HOMING_SINGLE_INDEX_L 10 /* single index w/limit */
|
|
|
#define DMD_HOMING_MULTI_INDEX 12 /* multi-index */
|
|
|
#define DMD_HOMING_MULTI_INDEX_L 14 /* multi-index w/limit */
|
|
|
#define DMD_HOMING_GATED_INDEX 16 /* single index and DIN2 */
|
|
|
#define DMD_HOMING_GATED_INDEX_L 18 /* single index and DIN2 w/limit */
|
|
|
#define DMD_HOMING_MULTI_INDEX_DS 20 /* multi-index w/defined stroke */
|
|
|
#define DMD_HOMING_IMMEDIATE 22 /* immediate */
|
|
|
#define DMD_HOMING_SINGLE_INDEX_DS 24 /* single index w/defined stroke */
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* init modes - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_INIT_NONE 0 /* none */
|
|
|
#define DMD_INIT_PULSE 1 /* current pulses */
|
|
|
#define DMD_INIT_CONTINOUS 2 /* continous current */
|
|
|
#define DMD_INIT_HALL_UNTIL_EDGE 3 /* digital hall sensor until edge */
|
|
|
#define DMD_INIT_HALL_UNTIL_INDEX 4 /* digital hall sensor until index */
|
|
|
#define DMD_INIT_HALL 5 /* digital hall sensor */
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* integrator mode - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_INTEGRATOR_ON 0 /* always off */
|
|
|
#define DMD_INTEGRATOR_IN_POSITION 1 /* on in position */
|
|
|
#define DMD_INTEGRATOR_OFF 2 /* always on */
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* motor phase correction - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_PHASE_CORR_PHASES 0 /* phase not inverted */
|
|
|
#define DMD_PHASE_CORR_FORCE 3 /* phase inverted */
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* lookup-table definitions - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_LKT_USER_0 0 /* user defined 0 */
|
|
|
#define DMD_LKT_USER_1 1 /* user defined 1 */
|
|
|
#define DMD_LKT_USER_2 2 /* user defined 2 */
|
|
|
#define DMD_LKT_USER_3 3 /* user defined 3 */
|
|
|
#define DMD_LKT_S_CURVE 25 /* s-curve */
|
|
|
#define DMD_LKT_TRIANGULAR 28 /* triangular */
|
|
|
#define DMD_LKT_SINE_CURVE 31 /* sine curve */
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* drive mode - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_MODE_FORCE_REFERENCE 0 /* force reference */
|
|
|
#define DMD_MODE_POSITION_PROFILE 1 /* position profile */
|
|
|
#define DMD_MODE_SPEED_REFERENCE 3 /* speed reference */
|
|
|
#define DMD_MODE_POSITION_REFERENCE 4 /* position reference */
|
|
|
#define DMD_MODE_PULSE_DIRECTION 5 /* pulse direction */
|
|
|
#define DMD_MODE_PULSE_DIRECTION_TTL 6 /* pulse direction TTL */
|
|
|
#define DMD_MODE_DSMAX_POSITION_REFERENC 7 /* DSMAX position reference */
|
|
|
#define DMD_MODE_POSITION_REFERENCE_2 36 /* position reference */
|
|
|
#define DMD_MODE_PULSE_DIRECTION_2 37 /* pulse direction */
|
|
|
#define DMD_MODE_PULSE_DIRECTION_TTL_2 38 /* pulse direction TTL */
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* motor phases - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_PWM_MODE_PHASES_1 10 /* 1 phase motor */
|
|
|
#define DMD_PWM_MODE_PHASE_1_LOW_SWITCHI 11 /* 1 phase motor with low switching freq */
|
|
|
#define DMD_PWM_MODE_PHASE_1_HIGH_CL_FRE 13 /* 1 phase motor with high cl freq. */
|
|
|
#define DMD_PWM_MODE_PHASES_2 20 /* 2 phase motor */
|
|
|
#define DMD_PWM_MODE_PHASE_2_LOW_SWITCHI 21 /* 2 phase motor with low switching freq. */
|
|
|
#define DMD_PWM_MODE_PHASE_2_HIGH_CL_FRE 23 /* 2 phase motor with high cl freq. */
|
|
|
#define DMD_PWM_MODE_PHASES_3 30 /* 3 phase motor */
|
|
|
#define DMD_PWM_MODE_PHASE_3_LOW_SWITCHI 31 /* 3 phase motor with low switching freq. */
|
|
|
#define DMD_PWM_MODE_PHASE_3_HIGH_CL_FRE 33 /* 3 phase motor with high cl freq. */
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* types of movement - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_MVT_TRAPEZIODAL 0 /* trapezoidal movement */
|
|
|
#define DMD_MVT_S_CURVE 1 /* S-curve movement */
|
|
|
#define DMD_MVT_INFINITE_ROTARY_SLOW 8 /* infinite rotary movement */
|
|
|
#define DMD_MVT_SLOW_LKT 10 /* LKT movement in slow interrupt */
|
|
|
#define DMD_MVT_FAST_LKT 11 /* LKT movement in fast interrupt */
|
|
|
#define DMD_MVT_INFINITE_ROTARY_FAST 12 /* infinite rotary movement (deprecated) */
|
|
|
#define DMD_MVT_TTL_DRIVEN_LKT 13 /* LKT movement drived by TTL encoder */
|
|
|
#define DMD_MVT_SCURVE_ROTARY 17 /* S-curve rotary movement */
|
|
|
#define DMD_MVT_INFINITE_ROTARY 24 /* infinite rotary movement */
|
|
|
#define DMD_MVT_LKT_ROTARY 26 /* LKT rotary movement */
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* drive products - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_PRODUCT_DSA2P 2 /* DSA2P drive (obsolete)*/
|
|
|
#define DMD_PRODUCT_DSB2P 4 /* DSB2P drive (obsolete)*/
|
|
|
#define DMD_PRODUCT_DSC2P 6 /* DSC2P drive */
|
|
|
#define DMD_PRODUCT_DSCDP 7 /* DSCDP drive */
|
|
|
#define DMD_PRODUCT_DSCDL 8 /* DSCDL drive */
|
|
|
#define DMD_PRODUCT_DSCDL_QT 9 /* DSCDL Servo Track Writer*/
|
|
|
#define DMD_PRODUCT_DSCDM 10 /* DSCDM drive*/
|
|
|
#define DMD_PRODUCT_DSCDU 11 /* DSCDU drive*/
|
|
|
#define DMD_PRODUCT_DSCDV 12 /* DSCDV drive*/
|
|
|
#define DMD_PRODUCT_ACCURET_12 12 /* AccurET^_12 drive*/
|
|
|
#define DMD_PRODUCT_DSCQT 13 /* DSCQT drive*/
|
|
|
#define DMD_PRODUCT_DSPAC2 14 /* DSPAC2 General purpose module */
|
|
|
#define DMD_PRODUCT_GP_MODULE 15 /* GP_MODULE General purpose module */
|
|
|
#define DMD_PRODUCT_DSMAX 16 /* DSMAX axis controller */
|
|
|
#define DMD_PRODUCT_DSMAX2 17 /* DSMAX2 axis controller */
|
|
|
#define DMD_PRODUCT_DSMAX3 18 /* DSMAX3 axis controller */
|
|
|
#define DMD_PRODUCT_DSMAC 19 /* DSMAC axis controller (alias for DSGAT-ST)*/
|
|
|
#define DMD_PRODUCT_DSGAT_ST 19 /* DSGAT-ST axis controller */
|
|
|
#define DMD_PRODUCT_ACCURET 32 /* AccurET drive */
|
|
|
#define DMD_PRODUCT_ACCURET_48V 33 /* AccurET 48V drive */
|
|
|
#define DMD_PRODUCT_ACCURET_300V 34 /* AccurET 300V drive */
|
|
|
#define DMD_PRODUCT_ACCURET_DFC 35 /* AccurET DFC drive */
|
|
|
#define DMD_PRODUCT_ACCURET_VHP 36 /* AccurET VHP drive */
|
|
|
#define DMD_PRODUCT_ULTIMET 48 /* UltimET multi-axis controller */
|
|
|
#define DMD_PRODUCT_ULTIMET_TCPIP 49 /* UltimET TCPIP multi-axis controller */
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* extension card products - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_X_PRODUCT_DSOSIO 1 /* DSOSIO super i/o */
|
|
|
#define DMD_X_PRODUCT_DSO001 2 /* DSO001 power i/o */
|
|
|
#define DMD_X_PRODUCT_DSOLVD 3 /* DSOLVD LVDT adapter */
|
|
|
#define DMD_X_PRODUCT_DSOMAC 4 /* DSOMAC MACRO bus */
|
|
|
#define DMD_X_PRODUCT_DSOTEB 5 /* DSOTEB (Turbo ETEL-BUS) */
|
|
|
#define DMD_X_PRODUCT_DSO003 6 /* DSO003 */
|
|
|
#define DMD_X_PRODUCT_DSOHIO 7 /* DSOHIO hyper i/o */
|
|
|
#define DMD_X_PRODUCT_DSOCAN_CNE 16 /* DSOCAN w/CANetel protocol */
|
|
|
#define DMD_X_PRODUCT_DSOCAN_CNW 17 /* DSOCAN w/Wuilfer protocol */
|
|
|
#define DMD_X_PRODUCT_DSOSER 24 /* DSOSER SERCOS bus */
|
|
|
#define DMD_X_PRODUCT_DSOPRO 32 /* DSOPRO PROFIBUS*/
|
|
|
#define DMD_X_PRODUCT_DSOSER2 25 /* DSOSER2 SERCOS bus */
|
|
|
#define DMD_X_PRODUCT_ACCURET_OPTIONAL_IO_BOARD 64 /* AccurET Optional IO board*/
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* regeneration modes - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_REGEN_OFF 0 /* always off */
|
|
|
#define DMD_REGEN_LIMITED 2 /* on for max 10s */
|
|
|
#define DMD_REGEN_ON 3 /* always on */
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* source type - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_TYP_BASIS_MASK 0x1F /**< mask applied on a byte representing a type to obtain the type basis */
|
|
|
#define DMD_TYP_FLOAT_BIT_MASK 0x20 /**< mask applied on a byte representing a type to obtain the float bit */
|
|
|
#define DMD_TYP_64_BIT_MASK 0x40 /**< mask applied on a byte representing a type to obtain the 64 bit */
|
|
|
|
|
|
#define DMD_TYP_NONE 0 /**< no type */
|
|
|
#define DMD_TYP_IMMEDIATE 0 /**< disabled or immediate value */
|
|
|
#define DMD_TYP_USER 1 /**< user registers */
|
|
|
#define DMD_TYP_PPK 2 /**< drive parameters */
|
|
|
#define DMD_TYP_MONITOR 3 /**< monitoring registers */
|
|
|
#define DMD_TYP_IMMEDIATE_HDWORD 4 /**< immediate 64 bits value HIGH double-word*/
|
|
|
#define DMD_TYP_SEQUENCE 5 /**< sequence buffer */
|
|
|
#define DMD_TYP_TRACE 6 /**< trace buffer */
|
|
|
#define DMD_TYP_ADDRESS 7 /**< address value */
|
|
|
#define DMD_TYP_LKT 8 /**< movement lookup tables */
|
|
|
#define DMD_TYP_TRIGGER 9 /**< triggers buffer */
|
|
|
#define DMD_TYP_REALTIME 10 /**< realtime buffer */
|
|
|
#define DMD_TYP_Y 11 /**< Y type variables */
|
|
|
#define DMD_TYP_FLOAT 12 /**< float register */
|
|
|
#define DMD_TYP_COMMON 13 /**< common register */
|
|
|
#define DMD_TYP_MAPPING 14 /**< P mapping registers */
|
|
|
|
|
|
#define DMD_TYP_IMMEDIATE_INT32 (DMD_TYP_IMMEDIATE) /**< immediate integer 32 bits */
|
|
|
#define DMD_TYP_IMMEDIATE_INT64 (DMD_TYP_IMMEDIATE | DMD_TYP_64_BIT_MASK) /**< immediate integer 64 bits */
|
|
|
#define DMD_TYP_IMMEDIATE_FLOAT32 (DMD_TYP_IMMEDIATE | DMD_TYP_FLOAT_BIT_MASK) /**< immediate float 32 bits */
|
|
|
#define DMD_TYP_IMMEDIATE_FLOAT64 (DMD_TYP_IMMEDIATE | DMD_TYP_FLOAT_BIT_MASK | DMD_TYP_64_BIT_MASK) /**< immediate float 64 bits */
|
|
|
#define DMD_TYP_IMMEDIATE_INT64_LDWORD (DMD_TYP_IMMEDIATE_INT64) /**< immediate integer 64 bits low double word*/
|
|
|
#define DMD_TYP_IMMEDIATE_INT64_HDWORD (DMD_TYP_IMMEDIATE_INT64 | DMD_TYP_IMMEDIATE_HDWORD) /**< immediate integer 64 bits high double word*/
|
|
|
#define DMD_TYP_IMMEDIATE_FLOAT64_LDWORD (DMD_TYP_IMMEDIATE_FLOAT64) /**< immediate integer 64 bits low double word*/
|
|
|
#define DMD_TYP_IMMEDIATE_FLOAT64_HDWORD (DMD_TYP_IMMEDIATE_FLOAT64 | DMD_TYP_IMMEDIATE_HDWORD) /**< immediate integer 64 bits high double word*/
|
|
|
|
|
|
#define DMD_TYP_USER_INT32 (DMD_TYP_USER) /**< user register integer 32 bits */
|
|
|
#define DMD_TYP_USER_INT64 (DMD_TYP_USER | DMD_TYP_64_BIT_MASK) /**< user register integer 64 bits */
|
|
|
#define DMD_TYP_USER_FLOAT32 (DMD_TYP_USER | DMD_TYP_FLOAT_BIT_MASK) /**< user register float 32 bits */
|
|
|
#define DMD_TYP_USER_FLOAT64 (DMD_TYP_USER | DMD_TYP_FLOAT_BIT_MASK | DMD_TYP_64_BIT_MASK) /**< user register float 64 bits */
|
|
|
|
|
|
#define DMD_TYP_PPK_INT32 (DMD_TYP_PPK) /**< drive parameters integer 32 bits */
|
|
|
#define DMD_TYP_PPK_INT64 (DMD_TYP_PPK | DMD_TYP_64_BIT_MASK) /**< drive parameters integer 64 bits */
|
|
|
#define DMD_TYP_PPK_FLOAT32 (DMD_TYP_PPK | DMD_TYP_FLOAT_BIT_MASK) /**< drive parameters float 32 bits */
|
|
|
#define DMD_TYP_PPK_FLOAT64 (DMD_TYP_PPK | DMD_TYP_FLOAT_BIT_MASK | DMD_TYP_64_BIT_MASK) /**< drive parameters float 64 bits */
|
|
|
|
|
|
#define DMD_TYP_MONITOR_INT32 (DMD_TYP_MONITOR) /**< monitoring registers integer 32 bits */
|
|
|
#define DMD_TYP_MONITOR_INT64 (DMD_TYP_MONITOR | DMD_TYP_64_BIT_MASK) /**< monitoring registers integer 64 bits */
|
|
|
#define DMD_TYP_MONITOR_FLOAT32 (DMD_TYP_MONITOR | DMD_TYP_FLOAT_BIT_MASK) /**< monitoring registers float 32 bits */
|
|
|
#define DMD_TYP_MONITOR_FLOAT64 (DMD_TYP_MONITOR | DMD_TYP_FLOAT_BIT_MASK | DMD_TYP_64_BIT_MASK) /**< monitoring registers float 64 bits */
|
|
|
|
|
|
#define DMD_TYP_TRACE_INT32 (DMD_TYP_TRACE) /**< trace buffer integer 32 bits */
|
|
|
#define DMD_TYP_TRACE_INT64 (DMD_TYP_TRACE | DMD_TYP_64_BIT_MASK) /**< trace buffer integer 64 bits */
|
|
|
#define DMD_TYP_TRACE_FLOAT32 (DMD_TYP_TRACE | DMD_TYP_FLOAT_BIT_MASK) /**< trace buffer float 32 bits */
|
|
|
#define DMD_TYP_TRACE_FLOAT64 (DMD_TYP_TRACE | DMD_TYP_FLOAT_BIT_MASK | DMD_TYP_64_BIT_MASK) /**< trace buffer float 64 bits */
|
|
|
|
|
|
#define DMD_TYP_LKT_FLOAT64 (DMD_TYP_LKT | DMD_TYP_FLOAT_BIT_MASK | DMD_TYP_64_BIT_MASK) /**< lookup table float 64 bits */
|
|
|
|
|
|
#define DMD_TYP_TRIGGER_INT64 (DMD_TYP_TRIGGER | DMD_TYP_64_BIT_MASK) /**< trigger buffer integer 64 bits */
|
|
|
|
|
|
#define DMD_TYP_Y_INT32 (DMD_TYP_Y) /**< Y type variables integer 32 bits */
|
|
|
#define DMD_TYP_Y_INT64 (DMD_TYP_Y | DMD_TYP_64_BIT_MASK) /**< Y type variables integer 64 bits */
|
|
|
#define DMD_TYP_Y_FLOAT32 (DMD_TYP_Y | DMD_TYP_FLOAT_BIT_MASK) /**< Y type variables float 32 bits */
|
|
|
#define DMD_TYP_Y_FLOAT64 (DMD_TYP_Y | DMD_TYP_FLOAT_BIT_MASK | DMD_TYP_64_BIT_MASK) /**< Y type variables float 64 bits */
|
|
|
|
|
|
#define DMD_TYP_COMMON_INT32 (DMD_TYP_COMMON) /**< common register integer 32 bits */
|
|
|
#define DMD_TYP_COMMON_INT64 (DMD_TYP_COMMON | DMD_TYP_64_BIT_MASK) /**< common register integer 64 bits */
|
|
|
#define DMD_TYP_COMMON_FLOAT32 (DMD_TYP_COMMON | DMD_TYP_FLOAT_BIT_MASK) /**< common register float 32 bits */
|
|
|
#define DMD_TYP_COMMON_FLOAT64 (DMD_TYP_COMMON | DMD_TYP_FLOAT_BIT_MASK | DMD_TYP_64_BIT_MASK) /**< user register float 64 bits */
|
|
|
|
|
|
#define DMD_TYP_MAPPING_INT32 (DMD_TYP_MAPPING) /**< P mapping integer 32 bits*/
|
|
|
|
|
|
#define DMD_INCREMENT_INT32 0 /**< increment typ integer 32 bits */
|
|
|
#define DMD_INCREMENT_INT64 (DMD_TYP_64_BIT_MASK) /**< increment typ integer 64 bits */
|
|
|
#define DMD_INCREMENT_FLOAT32 (DMD_TYP_FLOAT_BIT_MASK) /**< increment typ float 32 bits */
|
|
|
#define DMD_INCREMENT_FLOAT64 (DMD_TYP_64_BIT_MASK | DMD_TYP_FLOAT_BIT_MASK) /**< increment typ float 64 bits bits */
|
|
|
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* status drive 1 - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_SW1_ERROR_OTHER_AXIS LONG_MIN /* other axis error */
|
|
|
#define DMD_SW1_ERROR_BYTE -16777216 /* error byte */
|
|
|
#define DMD_SW1_POWER_ON 1 /* power on */
|
|
|
#define DMD_SW1_INIT_DONE 2 /* initialization done */
|
|
|
#define DMD_SW1_HOMING_DONE 4 /* indexation done */
|
|
|
#define DMD_SW1_PRESENT 8 /* present */
|
|
|
#define DMD_SW1_MOVING 16 /* moving */
|
|
|
#define DMD_SW1_IN_WINDOW 32 /* in window */
|
|
|
#define DMD_SW1_MASTER 64 /* EB master mode */
|
|
|
#define DMD_SW1_WAITING 128 /* driver is waiting */
|
|
|
#define DMD_SW1_EXEC_SEQ 256 /* sequence execution */
|
|
|
#define DMD_SW1_EDIT_SEQ 512 /* sequence edition */
|
|
|
#define DMD_SW1_ERROR_ANY 1024 /* global error */
|
|
|
#define DMD_SW1_TRACE_BUSY 2048 /* trace busy */
|
|
|
#define DMD_SW1_BRIDGE 4096 /* EB bridge mode */
|
|
|
#define DMD_SW1_HOMING 8192 /* homing */
|
|
|
#define DMD_SW1_EBL_TO_EB 16384 /* EBL to EB pass trough */
|
|
|
#define DMD_SW1_SPY 32768 /* EB spy mode */
|
|
|
#define DMD_SW1_WARNING_I2T 65536 /* i2t warning */
|
|
|
#define DMD_SW1_WARNING_TEMP 131072 /* over temperature warning */
|
|
|
#define DMD_SW1_WARNING_ENCODER 1048576 /* encoder warning */
|
|
|
#define DMD_SW1_WARNING_TRACKING 2097152 /* tracking warning */
|
|
|
#define DMD_SW1_WARNING_BYTE 16711680 /* warning byte */
|
|
|
#define DMD_SW1_ERROR_CURRENT 16777216 /* current error */
|
|
|
#define DMD_SW1_ERROR_CONTROLLER 33554432 /* controller error */
|
|
|
#define DMD_SW1_ERROR_ETB_COMM 67108864 /* EB communication error */
|
|
|
#define DMD_SW1_ERROR_TRAJECTORY 134217728 /* trajectory error */
|
|
|
#define DMD_SW1_ERROR_EBL_COMM 268435456 /* EBL communication error */
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* status drive 2 - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_SW2_SEQ_ERROR 1 /* sequence error label pending */
|
|
|
#define DMD_SW2_SEQ_WARNING 2 /* sequence warning label pending */
|
|
|
#define DMD_SW2_BP_WAITING 16 /* break point waiting */
|
|
|
#define DMD_SW2_USER_0 256 /* user bit 0 */
|
|
|
#define DMD_SW2_USER_1 512 /* user bit 1 */
|
|
|
#define DMD_SW2_USER_2 1024 /* user bit 2 */
|
|
|
#define DMD_SW2_USER_3 2048 /* user bit 3 */
|
|
|
#define DMD_SW2_USER_4 4096 /* user bit 4 */
|
|
|
#define DMD_SW2_USER_5 8192 /* user bit 5 */
|
|
|
#define DMD_SW2_USER_6 16384 /* user bit 6 */
|
|
|
#define DMD_SW2_USER_7 32768 /* user bit 7 */
|
|
|
#define DMD_SW2_USER_BYTE 65280 /* user mask */
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* current loop adc resolution - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_CUR_ADC_BITS_12 0 /* 12 bits */
|
|
|
#define DMD_CUR_ADC_BITS_14 1 /* 14 bits */
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* current LKT mode - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_LKT_MODE_FINE_ADJUST 1 /* fine phase adjustment */
|
|
|
#define DMD_LKT_MODE_ROLLOVER 2 /* rollover counter */
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* monitoring register number - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_MON_DEST_X_AOUT_1 173 /* extended analog output 1 */
|
|
|
#define DMD_MON_DEST_X_AOUT_2 174 /* extended analog output 2 */
|
|
|
#define DMD_MON_DEST_AOUT_1 175 /* analog output 1 */
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* flash operations - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_FLASH_ALL 0 /* all */
|
|
|
#define DMD_FLASH_SEQ_LKT 1 /* sequence and user LKT */
|
|
|
#define DMD_FLASH_OTHER_PARAMS 2 /* other parameters */
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* master modes - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_MASTER_EXIT 0 /* exit master mode */
|
|
|
#define DMD_MASTER_MASTER 1 /* enter master mode */
|
|
|
#define DMD_MASTER_BRIDGE 2 /* enter bridge mode */
|
|
|
#define DMD_MASTER_MASTER_AR 3 /* enter master mode w/auto-recovery */
|
|
|
#define DMD_MASTER_BRIDGE_AR 4 /* enter bridge mode w/auto-recovery */
|
|
|
#define DMD_MASTER_SPY 255 /* enter spy mode */
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* automatic operations - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_AUTO_CURRENT_LOOP 1 /* tune current loop */
|
|
|
#define DMD_AUTO_PHASE_CORRECTION 2 /* set motor phase correction */
|
|
|
#define DMD_AUTO_PHASE_ADJUSTMENT 8 /* tune fine phase adjustment */
|
|
|
#define DMD_AUTO_POSITION_LOOP 16 /* tune regulator parameters */
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* breakpoint commands - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_BREAKPOINT_SET 1 /* set breakpoint */
|
|
|
#define DMD_BREAKPOINT_CLEAR 2 /* clear breakpoint */
|
|
|
#define DMD_BREAKPOINT_SET_ALL 3 /* set all breakpoints */
|
|
|
#define DMD_BREAKPOINT_CLEAR_ALL 4 /* clear all breakpoints */
|
|
|
#define DMD_BREAKPOINT_GLOBAL 5 /* set global breakpoint */
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* continue commands - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_CONTINUE_CLEAR 0 /* clear breakpoint counter */
|
|
|
#define DMD_CONTINUE_STEP 1 /* step after breakpoint */
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* download options - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_DOWNLOAD_PASS_THROUGH 170 /* enter EBL/EB pass trough mode */
|
|
|
#define DMD_DOWNLOAD_DIRECT 255 /* enter download mode */
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* reboot option - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_SHUTDOWN_MAGIC 255 /* magic number */
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* setpoint buffer mask - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_SETPOINT_TARGET_POSITION 1 /* target position */
|
|
|
#define DMD_SETPOINT_PROFILE_VELOCITY 2 /* profile velocity */
|
|
|
#define DMD_SETPOINT_PROFILE_ACCELERATIO 4 /* profile acceleration */
|
|
|
#define DMD_SETPOINT_JERK_FILTER_TIME 8 /* jerk filter time */
|
|
|
#define DMD_SETPOINT_PROFILE_DECELERATIO 16 /* profile deceleration */
|
|
|
#define DMD_SETPOINT_END_VELOCITY 32 /* end velocity */
|
|
|
#define DMD_SETPOINT_PROFILE_TYPE 64 /* profile type */
|
|
|
#define DMD_SETPOINT_MVT_LKT_NUMBER 128 /* lookup table number */
|
|
|
#define DMD_SETPOINT_MVT_LKT_TIME 256 /* lookup table time */
|
|
|
#define DMD_SETPOINT_MVT_LKT_AMPLITUDE 512 /* movement lookup table amplitude */
|
|
|
#define DMD_SETPOINT_MVT_DIRECTION 1024 /* movement direction */
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* trace trigger mode - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_TRACE_TRIG_NONE 0 /* no trigger */
|
|
|
#define DMD_TRACE_TRIG_MVT_START 1 /* start of movement */
|
|
|
#define DMD_TRACE_TRIG_MVT_END 2 /* end of movement */
|
|
|
#define DMD_TRACE_TRIG_POSITION 3 /* specified position */
|
|
|
#define DMD_TRACE_TRIG_VALUE_1 4 /* value on first channel */
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* fast interrupt time - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_FAST_INT_SYNCHRO 4 /* PWM synchronization */
|
|
|
#define DMD_FAST_INT_U_166 0 /* 166 us */
|
|
|
#define DMD_FAST_INT_U_125 1 /* 125 us */
|
|
|
#define DMD_FAST_INT_U_83 2 /* 83 us */
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* rotary movement direction - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_MVT_DIR_POSITIVE 0 /* positive movement */
|
|
|
#define DMD_MVT_DIR_NEGATIVE 1 /* negative movement */
|
|
|
#define DMD_MVT_DIR_SHORTEST 2 /* shortest movement */
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* concatenated mode - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_CONCAT_MODE_DISABLED 0 /* concatened movement disabled */
|
|
|
#define DMD_CONCAT_MODE_ENABLED 1 /* concatened movement enabled */
|
|
|
#define DMD_CONCAT_MODE_LKT_ONLY 2 /* concatened movement enabled for LKT */
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* LKT selection mode - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_X45_X0 0 /* the start and target position of the LKT is not the same */
|
|
|
#define DMD_X45_X1 1 /* the start and target position of the LKT is the same */
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* fuse status - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_FUSE_STAT_F3_FUSE 1 /* fuse F3 dead */
|
|
|
#define DMD_FUSE_STAT_F7_FUSE 2 /* fuse F7 dead */
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* SLS selection mode - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_SLS_MODE_NEGATIVE_MVT 1 /* begin by negative movement */
|
|
|
#define DMD_SLS_MODE_MECHANICAL 0 /* mechanical end stop */
|
|
|
#define DMD_SLS_MODE_LIMIT_SW 2 /* limit switch */
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* profile buffer - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_PROFILE_BUF_IMMEDIATE 0 /* immediate */
|
|
|
#define DMD_PROFILE_BUF_BUFFER_1 1 /* buffer 1 */
|
|
|
#define DMD_PROFILE_BUF_BUFFER_2 2 /* buffer 2 */
|
|
|
#define DMD_PROFILE_BUF_BUFFER_3 3 /* buffer 3 */
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* monitor channel - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_MON_CHANNEL_0 0 /* channel 0 */
|
|
|
#define DMD_MON_CHANNEL_1 1 /* channel 1 */
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* sequence buffer subindex - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_SEQ_HEADER 0 /* header */
|
|
|
#define DMD_SEQ_PARAMETER_1 1 /* parameter 1 */
|
|
|
#define DMD_SEQ_PARAMETER_2 2 /* parameter 2 */
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* realtime table - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_REALTIME_HEADER 0 /* header */
|
|
|
#define DMD_REALTIME_PARAMETER_1 1 /* parameter 1 */
|
|
|
#define DMD_REALTIME_PARAMETER_2 2 /* parameter 2 */
|
|
|
#define DMD_REALTIME_PARAMETER_3 3 /* parameter 3 */
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* realtime header - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_RT_HEADER_STATUS_MASK -16777216 /* status mask */
|
|
|
#define DMD_RT_HEADER_TYPE_MASK 255 /* type mask */
|
|
|
#define DMD_RT_HEADER_LABEL_MASK 65280 /* label mask */
|
|
|
#define DMD_RT_HEADER_CLEAR_WAIT_MODE 65536 /* clear wait mode */
|
|
|
#define DMD_RT_HEADER_MODE_MASK 16711680 /* mode mask */
|
|
|
#define DMD_RT_HEADER_VALID_STATUS 16777216 /* valid status */
|
|
|
#define DMD_RT_HEADER_ACTIVE_STATUS 33554432 /* active status */
|
|
|
#define DMD_RT_HEADER_ENABLE_STATUS 67108864 /* enable status */
|
|
|
#define DMD_RT_HEADER_WAITING_CMD_STATUS 134217728 /* waiting command status */
|
|
|
#define DMD_RT_HEADER_NO_OPERATION 0 /* no operation */
|
|
|
#define DMD_RT_HEADER_BIT_COPY 2 /* bit copy */
|
|
|
#define DMD_RT_HEADER_BIT_TEST 3 /* bit test */
|
|
|
#define DMD_RT_HEADER_MASK_TEST 4 /* mask test */
|
|
|
#define DMD_RT_HEADER_REGISTER_TEST 20 /* register test */
|
|
|
#define DMD_RT_HEADER_REGISTER_COMPARE 21 /* register compare */
|
|
|
#define DMD_RT_HEADER_SIMPLE_CLOCK 40 /* simple clock */
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* trigger table - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_TRIGGER_HEADER 0 /* header */
|
|
|
#define DMD_TRIGGER_OUT_MASK 1 /* output mask */
|
|
|
#define DMD_TRIGGER_SW_MASK 2 /* status mask */
|
|
|
#define DMD_TRIGGER_POSITION 3 /* position */
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* trigger header - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_TRIG_HEADER_TYPE_MASK 255 /* trigger type */
|
|
|
#define DMD_TRIG_HEADER_ACTION_MASK 16711680 /* trigger action */
|
|
|
#define DMD_TRIG_HEADER_NO_OPERATION 0 /* no operation */
|
|
|
#define DMD_TRIG_HEADER_DISABLED 128 /* disabled */
|
|
|
#define DMD_TRIG_HEADER_POSITIVE 129 /* positive */
|
|
|
#define DMD_TRIG_HEADER_NEGATIVE 130 /* negative */
|
|
|
#define DMD_TRIG_HEADER_BIDIRECTIONAL 131 /* bidirectional */
|
|
|
#define DMD_TRIG_HEADER_SET_OUT_SW 65536 /* set output and user sw */
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* trace buffer - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_TRACE_BUFFER_0 0 /* buffer 0 */
|
|
|
#define DMD_TRACE_BUFFER_1 1 /* buffer 1 */
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* hall lookup table - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_HALL_LKT_LKT_0 0 /* lookup table 0 */
|
|
|
#define DMD_HALL_LKT_LKT_1 1 /* lookup table 1 */
|
|
|
#define DMD_HALL_LKT_LKT_2 2 /* lookup table 2 */
|
|
|
#define DMD_HALL_LKT_LKT_3 3 /* lookup table 3 */
|
|
|
#define DMD_HALL_LKT_LKT_4 4 /* lookup table 4 */
|
|
|
#define DMD_HALL_LKT_LKT_5 5 /* lookup table 5 */
|
|
|
#define DMD_HALL_LKT_LKT_6 6 /* lookup table 6 */
|
|
|
#define DMD_HALL_LKT_LKT_7 7 /* lookup table 7 */
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* interrupt edge - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_INT_EDGE_POSITIVE 0 /* positive */
|
|
|
#define DMD_INT_EDGE_NEGATIVE 1 /* negative */
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* test mode - c
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* special download/upload stream command
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#define DMD_CMD_START_DOWNLOAD_STREAM_FIRMWARE 0xF0
|
|
|
//#define 0xF1 is reserved for ETB_R_DOWNLOAD_DATA
|
|
|
#define DMD_CMD_START_UPLOAD_STREAM_FIRMWARE 0xF2
|
|
|
//#define 0xF3 is reserved for ETB_R_UPLOAD_DATA
|
|
|
#define DMD_CMD_START_FIRMWARE 0xF4
|
|
|
#define DMD_CMD_START_DOWNLOAD_SEQUENCE 0xF5
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#define DMD_CMD_START_UPLOAD_SEQUENCE 0xF6
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#define DMD_CMD_START_UPLOAD_TRACE 0xF7
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#define DMD_CMD_START_DOWNLOAD_PARAMETER 0xF8
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#define DMD_CMD_START_UPLOAD_PARAMETER 0xF9
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#define DMD_CMD_DOWNLOAD_DATA 0xFA
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#define DMD_CMD_UPLOAD_DATA 0xFB
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/*------------------------------------------------------------------------------
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* drive (record 20h) command numbers
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*-----------------------------------------------------------------------------*/
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#ifndef DMD_OO_API
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#define DMD_CMD_ACKNOWLEDGE_INTERRUPT 118 /* acknowledge interrupt */
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#define DMD_CMD_ADD_ACC 161 /* Adds accumulator */
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#define DMD_CMD_ADD_REGISTER 91 /* Adds register */
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#define DMD_CMD_AND_ACC 165 /* And accumulator */
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#define DMD_CMD_AND_NOT_ACC 167 /* And not accumulator */
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#define DMD_CMD_AND_NOT_REGISTER 97 /* AND NOT register */
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#define DMD_CMD_AND_REGISTER 95 /* AND register */
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#define DMD_CMD_AUTO_CONFIG_CL 150 /* Auto config current loop */
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#define DMD_CMD_CALL_SUBROUTINE 68 /* Calls subroutine */
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#define DMD_CMD_CAN_COMMAND_1 250 /* Can command 1 */
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#define DMD_CMD_CAN_COMMAND_2 251 /* Can command 2 */
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#define DMD_CMD_CHANGE_AXIS 109 /* Changes axis */
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#define DMD_CMD_CHANGE_POWER 124 /* Changes power */
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#define DMD_CMD_CLEAR_CALL_STACK 34 /* Clears called stack */
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#define DMD_CMD_CLEAR_PENDING_ERROR 50 /* Clear pending error */
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#define DMD_CMD_CLEAR_PENDING_WARNING 51 /* clear pending warning */
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#define DMD_CMD_CLEAR_TRIGGER_TABLE 107 /* Clears trigger table */
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#define DMD_CMD_CLEAR_USER_VAR 17 /* Clears all user registers */
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#define DMD_CMD_CONV_REGISTER 122 /* Converts between int and float */
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#define DMD_CMD_DEFINE_EMPTY_TRIGGER 108 /* define empty trigger */
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#define DMD_CMD_DEFINE_LABEL 27 /* Defines a label */
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#define DMD_CMD_DEFINE_NEG_TRIGGER 106 /* define negative trigger */
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#define DMD_CMD_DEFINE_POS_TRIGGER 105 /* define positive trigger */
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#define DMD_CMD_DIVIDE_ACC 163 /* Divides accumulator */
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#define DMD_CMD_DIVIDE_REGISTER 94 /* Divides register */
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#define DMD_CMD_DRIVE_NEW 78 /* Controller new */
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#define DMD_CMD_DRIVE_RESTORE 49 /* Controller restore */
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#define DMD_CMD_DRIVE_SAVE 48 /* Controller save */
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#define DMD_CMD_EDIT_SEQUENCE 62 /* Edit sequence */
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#define DMD_CMD_ENABLE_RTI 183 /* realtime enable when seq_on 0 */
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#define DMD_CMD_ENTER_DOWNLOAD 42 /* Enter download mode */
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#define DMD_CMD_EXIT_SEQUENCE 63 /* Exit sequence */
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#define DMD_CMD_FLOAT_COS 223 /* Executes command cos */
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#define DMD_CMD_FLOAT_FRAC_PART 225 /* Executes command frac_part */
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#define DMD_CMD_FLOAT_INT_PART 226 /* Executes command int_part */
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#define DMD_CMD_FLOAT_INV 221 /* Executes command inv */
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#define DMD_CMD_FLOAT_SIGN 224 /* Executes command sign */
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#define DMD_CMD_FLOAT_SIN 222 /* Executes command sin */
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#define DMD_CMD_FLOAT_SQRT 220 /* Executes command sqrt */
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#define DMD_CMD_FLOAT_TEST 227 /* Executes command test */
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#define DMD_CMD_HARDWARE_RESET 600 /* Hardware reset */
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#define DMD_CMD_HOMING_START 45 /* Homing start */
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#define DMD_CMD_HOMING_SYNCHRONISED 41 /* Synchronized homing */
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#define DMD_CMD_IF_EQUAL 151 /* Jumps if par1 equal XAC */
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#define DMD_CMD_IF_GREATER 154 /* Jumps if par1 greater XAC */
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#define DMD_CMD_IF_GREATER_OR_EQUAL 156 /* Jumps if par1 greater or equal XAC */
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#define DMD_CMD_IF_LOWER 153 /* Jumps if par1 lower XAC */
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#define DMD_CMD_IF_LOWER_OR_EQUAL 155 /* Jumps if par1 less or equal XAC */
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#define DMD_CMD_IF_NOT_EQUAL 152 /* Jumps if par1 different XAC */
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#define DMD_CMD_INI_START 44 /* Phasing start */
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#define DMD_CMD_INPUT_START_MVT 33 /* Starts mvt on input */
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#define DMD_CMD_INVERT_REGISTER 174 /* Inverts register */
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#define DMD_CMD_IPOL_ABS_COORDS 556 /* Assigns the coordinates of the current position of the axes */
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#define DMD_CMD_IPOL_ABS_MODE 555 /* Sets (1) or clears (0) the abs ref coordinates mode */
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#define DMD_CMD_IPOL_BEGIN 553 /* Enter to interpolated mode */
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#define DMD_CMD_IPOL_BEGIN_CONCATENATION 1030 /* Starts the concatenation */
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#define DMD_CMD_IPOL_CIRCLE_CCW_C2D 1041 /* Adds circular segment to trajectory */
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#define DMD_CMD_IPOL_CIRCLE_CCW_R2D 1027 /* Adds circular segment to trajectory */
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#define DMD_CMD_IPOL_CIRCLE_CW_C2D 1040 /* Adds circular segment to trajectory */
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#define DMD_CMD_IPOL_CIRCLE_CW_R2D 1026 /* Adds circular segment to trajectory */
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#define DMD_CMD_IPOL_CONTINUE 654 /* Restarts interpolation after a quick stop */
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#define DMD_CMD_IPOL_DISABLE_UCONCATENATION 1052 /* Forces to stop before the next universal line */
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#define DMD_CMD_IPOL_END 554 /* Leave the interpolated mode */
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#define DMD_CMD_IPOL_END_CONCATENATION 1031 /* Stops the concatenation */
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#define DMD_CMD_IPOL_LINE 1025 /* Adds linear segment to trajectory */
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#define DMD_CMD_IPOL_LKT 1032 /* Adds lkt segment to trajectory */
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#define DMD_CMD_IPOL_LOCK 1044 /* Locks the trajectory execution */
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#define DMD_CMD_IPOL_MARK 1039 /* Puts a mark in the trajectory */
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#define DMD_CMD_IPOL_MATRIX_ROTATE 1056 /* Rotates the selected axis plane */
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#define DMD_CMD_IPOL_MATRIX_SCALE 1055 /* Scales the selected axes */
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#define DMD_CMD_IPOL_MATRIX_SHEAR 1057 /* Shears selected axes */
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#define DMD_CMD_IPOL_MATRIX_TRANSLATE 1054 /* Translates the reference frame */
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#define DMD_CMD_IPOL_PT 1045 /* Adds pt segment to trajectory */
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#define DMD_CMD_IPOL_PUSH 1279 /* push parameters for ipol commands */
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#define DMD_CMD_IPOL_PVT 1028 /* Adds pvt segment to trajectory */
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#define DMD_CMD_IPOL_PVT_UPDATE 662 /* Updates registers for PVT trajectory */
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#define DMD_CMD_IPOL_RESET 652 /* reset interpolation */
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#define DMD_CMD_IPOL_SET 552 /* Sets the interpolation axis */
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#define DMD_CMD_IPOL_STOP_EMCY 656 /* Stops interpolation emergency */
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#define DMD_CMD_IPOL_STOP_SMOOTH 653 /* Stops interpolation smooth */
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#define DMD_CMD_IPOL_TAN_ACCELERATION 1036 /* Adds acceleration modification to trajectory */
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#define DMD_CMD_IPOL_TAN_DECELERATION 1037 /* Adds deceleration modification to trajectory */
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#define DMD_CMD_IPOL_TAN_JERK_TIME 1038 /* Adds jerk time modification to trajectory */
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#define DMD_CMD_IPOL_TAN_VELOCITY 1035 /* Adds speed modification to trajectory */
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#define DMD_CMD_IPOL_ULINE 1033 /* Adds universal linear segment to trajectory */
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#define DMD_CMD_IPOL_UNLOCK 655 /* Unlock the ipol buffer */
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#define DMD_CMD_IPOL_URELATIVE 1051 /* Enables or disables relative mode */
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#define DMD_CMD_IPOL_USPEED 1049 /* Changes speed for universal linear moves */
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#define DMD_CMD_IPOL_USPEED_AXISMASK 1053 /* Changes the axis mask for tangential speed */
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#define DMD_CMD_IPOL_UTIME 1050 /* Changes acceleration and jerk time for universal linear moves */
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#define DMD_CMD_IPOL_WAIT_TIME 1029 /* Waits before continue the trajectory */
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#define DMD_CMD_JUMP_BIT_CLEAR 37 /* Jump bit clear */
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#define DMD_CMD_JUMP_BIT_SET 36 /* Jump bit set */
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#define DMD_CMD_JUMP_LABEL 26 /* Jumps to label */
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#define DMD_CMD_MAPPING_ASP 234 /* SET slot address for stage error mapping mode */
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#define DMD_CMD_MAPPING_MAM 199 /* Set all involved axes mask and corrected axes mask */
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#define DMD_CMD_MAPPING_MCS 200 /* Stage error mapping command, set the cyclic stroke of source axes */
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#define DMD_CMD_MAPPING_MCT 193 /* Set config. and table nbr info for stage error mapping */
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#define DMD_CMD_MAPPING_MDA 195 /* Set dimension and axes for stage error mapping */
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#define DMD_CMD_MAPPING_MDT 192 /* Set date and time info for stage error mapping */
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#define DMD_CMD_MAPPING_MMO 194 /* Set correction mode for stage error mapping */
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#define DMD_CMD_MAPPING_MSI 190 /* Set string info for stage error mapping */
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#define DMD_CMD_MAPPING_MSR 196 /* Set mapping source registers for stage error mapping */
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#define DMD_CMD_MAPPING_MSV 191 /* Set version info for stage error mapping */
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#define DMD_CMD_MAPPING_MTP 197 /* Set mapping origin for stage error mapping */
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#define DMD_CMD_MAPPING_MTU 198 /* Set mapping unit factor for stage error mapping */
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#define DMD_CMD_MASTER_MODE 143 /* master mode */
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#define DMD_CMD_MODULO_REGISTER 101 /* Modulo register */
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#define DMD_CMD_MULTIPLY_ACC 162 /* Multiplies accumulator */
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#define DMD_CMD_MULTIPLY_REGISTER 93 /* Multiplies register */
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#define DMD_CMD_OR_ACC 164 /* Or accumulator */
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#define DMD_CMD_OR_NOT_ACC 166 /* Or not accumulator */
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#define DMD_CMD_OR_NOT_REGISTER 98 /* OR NOT register */
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#define DMD_CMD_OR_REGISTER 96 /* OR register */
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#define DMD_CMD_PROFILED_MOVE 60 /* Start movement */
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#define DMD_CMD_PURGE 190 /* purge */
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#define DMD_CMD_PUSH 255 /* Push parameters */
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#define DMD_CMD_REALTIME_DISABLE 176 /* Real-time disable */
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#define DMD_CMD_REALTIME_ENABLE 175 /* Real-time enable */
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#define DMD_CMD_RELATIVE_PROFILED_MOVE 62 /* Start relative movement */
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#define DMD_CMD_RESET_BUS 87 /* reset bus */
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#define DMD_CMD_RESET_CONTROLLER 88 /* Resets controller */
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#define DMD_CMD_RESET_DRIVE 88 /* Resets controller */
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#define DMD_CMD_RESET_ERROR 79 /* Resets error */
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#define DMD_CMD_RESET_TRIGGER 104 /* reset trigger */
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#define DMD_CMD_SEARCH_LIMIT_STROKE 46 /* Searches limit stroke */
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#define DMD_CMD_SET_DEBUG_TIMEOUT 180 /* set debug timeout */
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#define DMD_CMD_SET_GROUP_MASK 40 /* set group mask */
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#define DMD_CMD_SET_GUARD_TIMEOUT 181 /* set guard timeout */
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#define DMD_CMD_SET_REGISTER 123 /* Sets register */
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#define DMD_CMD_SET_REGISTER_DEPTH 125 /* Set max all depths par1 with value par2 to parx */
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#define DMD_CMD_SET_USER_POSITION 22 /* Sets user position */
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#define DMD_CMD_SET_VERSION 20 /* Set version parameters */
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#define DMD_CMD_SHIFT_LEFT_ACC 169 /* Shift left accumulator */
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#define DMD_CMD_SHIFT_LEFT_REGISTER 173 /* Shift left register */
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#define DMD_CMD_SHIFT_RIGHT_ACC 168 /* Shift right accumulator */
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#define DMD_CMD_SHIFT_RIGHT_REGISTER 172 /* Shift right register */
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#define DMD_CMD_START_MVT 25 /* Starts movement */
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#define DMD_CMD_STEP_ABSOLUTE 129 /* Absolute step */
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#define DMD_CMD_STEP_NEGATIVE 115 /* Negative step */
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#define DMD_CMD_STEP_POSITIVE 114 /* Positive step */
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#define DMD_CMD_STOP_MOTOR_EMCY 18 /* Emergency stop */
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#define DMD_CMD_STOP_MOTOR_SMOOTH 70 /* Stops motor smoothly */
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#define DMD_CMD_STOP_SEQ_MOTOR_EMCY 120 /* Stops seq motor emergency */
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#define DMD_CMD_STOP_SEQ_MOTOR_SMOOTH 121 /* Stops seq motor smooth */
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#define DMD_CMD_STOP_SEQ_POWER_OFF 119 /* Stops seq power off */
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#define DMD_CMD_STOP_SEQUENCE 0 /* Stops sequence thread */
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#define DMD_CMD_SUBROUTINE_RETURN 69 /* Subroutine return */
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#define DMD_CMD_SUBSTRACT_ACC 160 /* Substracts accumulator */
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#define DMD_CMD_SUBSTRACT_REGISTER 92 /* Substracts register */
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#define DMD_CMD_SYNCRO_START_MVT 35 /* syncro start mvt */
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#define DMD_CMD_WAIT_AXIS_BUSY 13 /* Waits for end of axis busy */
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#define DMD_CMD_WAIT_BIT_CLEAR 54 /* Wait bit clear */
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#define DMD_CMD_WAIT_BIT_CLEAR_USER_CHANNEL_12 272 /* Set user status bit#12 during wait bit clear */
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#define DMD_CMD_WAIT_BIT_CLEAR_USER_CHANNEL_13 273 /* Set user status bit#13 during wait bit clear */
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#define DMD_CMD_WAIT_BIT_CLEAR_USER_CHANNEL_14 274 /* Set user status bit#14 during wait bit clear */
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#define DMD_CMD_WAIT_BIT_CLEAR_USER_CHANNEL_15 275 /* Set user status bit#15 during wait bit clear */
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#define DMD_CMD_WAIT_BIT_SET 55 /* Wait bit set */
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#define DMD_CMD_WAIT_BIT_SET_USER_CHANNEL_12 276 /* Set user status bit#12 during wait bit set */
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#define DMD_CMD_WAIT_BIT_SET_USER_CHANNEL_13 277 /* Set user status bit#13 during wait bit set */
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#define DMD_CMD_WAIT_BIT_SET_USER_CHANNEL_14 278 /* Set user status bit#14 during wait bit set */
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#define DMD_CMD_WAIT_BIT_SET_USER_CHANNEL_15 279 /* Set user status bit#15 during wait bit set */
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#define DMD_CMD_WAIT_BUSY 148 /* Wait busy */
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#define DMD_CMD_WAIT_GREATER 53 /* Waits for greater */
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#define DMD_CMD_WAIT_GREATER_USER_CHANNEL_12 280 /* Set user status bit#12 during wait greater unsigned */
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#define DMD_CMD_WAIT_GREATER_USER_CHANNEL_13 281 /* Set user status bit#13 during wait greater unsigned */
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#define DMD_CMD_WAIT_GREATER_USER_CHANNEL_14 282 /* Set user status bit#14 during wait greater unsigned */
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#define DMD_CMD_WAIT_GREATER_USER_CHANNEL_15 283 /* Set user status bit#15 during wait greater unsigned */
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#define DMD_CMD_WAIT_IN_WINDOW 11 /* Waits in window */
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#define DMD_CMD_WAIT_IN_WINDOW_USER_CHANNEL_12 308 /* Set user status bit#12 during wait in window */
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#define DMD_CMD_WAIT_IN_WINDOW_USER_CHANNEL_13 309 /* Set user status bit#13 during wait in window */
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#define DMD_CMD_WAIT_IN_WINDOW_USER_CHANNEL_14 310 /* Set user status bit#14 during wait in window */
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#define DMD_CMD_WAIT_IN_WINDOW_USER_CHANNEL_15 311 /* Set user status bit#15 during wait in window */
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#define DMD_CMD_WAIT_LOWER 52 /* Waits for lower */
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#define DMD_CMD_WAIT_LOWER_USER_CHANNEL_12 284 /* Set user status bit#12 during wait lower unsigned */
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#define DMD_CMD_WAIT_LOWER_USER_CHANNEL_13 285 /* Set user status bit#13 during wait lower unsigned */
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#define DMD_CMD_WAIT_LOWER_USER_CHANNEL_14 286 /* Set user status bit#14 during wait lower unsigned */
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#define DMD_CMD_WAIT_LOWER_USER_CHANNEL_15 287 /* Set user status bit#15 during wait lower unsigned */
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#define DMD_CMD_WAIT_MARK 513 /* wait until the movement reach a mark */
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#define DMD_CMD_WAIT_MARK_USER_CHANNEL_12 523 /* wait until the movement reach a mark */
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#define DMD_CMD_WAIT_MARK_USER_CHANNEL_13 524 /* wait until the movement reach a mark */
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#define DMD_CMD_WAIT_MARK_USER_CHANNEL_14 525 /* wait until the movement reach a mark */
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#define DMD_CMD_WAIT_MARK_USER_CHANNEL_15 526 /* wait until the movement reach a mark */
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#define DMD_CMD_WAIT_MOVEMENT 8 /* Waits for movement */
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#define DMD_CMD_WAIT_MOVEMENT_USER_CHANNEL_12 296 /* Set user status bit#12 during wait for movement */
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#define DMD_CMD_WAIT_MOVEMENT_USER_CHANNEL_13 297 /* Set user status bit#13 during wait for movement */
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#define DMD_CMD_WAIT_MOVEMENT_USER_CHANNEL_14 298 /* Set user status bit#14 during wait for movement */
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#define DMD_CMD_WAIT_MOVEMENT_USER_CHANNEL_15 299 /* Set user status bit#15 during wait for movement */
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#define DMD_CMD_WAIT_POSITION 9 /* Waits for position */
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#define DMD_CMD_WAIT_POSITION_USER_CHANNEL_12 300 /* Set user status bit#12 during wait for position */
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#define DMD_CMD_WAIT_POSITION_USER_CHANNEL_13 301 /* Set user status bit#13 during wait for position */
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#define DMD_CMD_WAIT_POSITION_USER_CHANNEL_14 302 /* Set user status bit#14 during wait for position */
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#define DMD_CMD_WAIT_POSITION_USER_CHANNEL_15 303 /* Set user status bit#15 during wait for position */
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#define DMD_CMD_WAIT_SGN_GREATER 57 /* Waits for greater signed */
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#define DMD_CMD_WAIT_SGN_GREATER_USER_CHANNEL_12 288 /* Set user status bit#12 during wait greater signed */
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#define DMD_CMD_WAIT_SGN_GREATER_USER_CHANNEL_13 289 /* Set user status bit#13 during wait greater signed */
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#define DMD_CMD_WAIT_SGN_GREATER_USER_CHANNEL_14 290 /* Set user status bit#14 during wait greater signed */
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#define DMD_CMD_WAIT_SGN_GREATER_USER_CHANNEL_15 291 /* Set user status bit#15 during wait greater signed */
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#define DMD_CMD_WAIT_SGN_LOWER 56 /* Waits for lower signed */
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#define DMD_CMD_WAIT_SGN_LOWER_USER_CHANNEL_12 292 /* Set user status bit#12 during wait lower signed */
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#define DMD_CMD_WAIT_SGN_LOWER_USER_CHANNEL_13 293 /* Set user status bit#13 during wait lower signed */
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#define DMD_CMD_WAIT_SGN_LOWER_USER_CHANNEL_14 294 /* Set user status bit#14 during wait lower signed */
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#define DMD_CMD_WAIT_SGN_LOWER_USER_CHANNEL_15 295 /* Set user status bit#15 during wait lower signed */
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|
#define DMD_CMD_WAIT_STATUS_BIT_CLEAR_CHANNEL_12 531 /* Wait status bit clear */
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#define DMD_CMD_WAIT_STATUS_BIT_CLEAR_CHANNEL_13 532 /* Wait status bit clear */
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#define DMD_CMD_WAIT_STATUS_BIT_CLEAR_CHANNEL_14 533 /* Wait status bit clear */
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#define DMD_CMD_WAIT_STATUS_BIT_CLEAR_CHANNEL_15 534 /* Wait status bit clear */
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#define DMD_CMD_WAIT_STATUS_BIT_SET_CHANNEL_12 527 /* Wait status bit set */
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#define DMD_CMD_WAIT_STATUS_BIT_SET_CHANNEL_13 528 /* Wait status bit set */
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#define DMD_CMD_WAIT_STATUS_BIT_SET_CHANNEL_14 529 /* Wait status bit set */
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#define DMD_CMD_WAIT_STATUS_BIT_SET_CHANNEL_15 530 /* Wait status bit set */
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|
#define DMD_CMD_WAIT_TH_SPEED 12 /* wait theoretical speed */
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#define DMD_CMD_WAIT_TIME 10 /* Waits for time */
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#define DMD_CMD_WAIT_TIME_USER_CHANNEL_12 304 /* Set user status bit#12 during wait for time */
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#define DMD_CMD_WAIT_TIME_USER_CHANNEL_13 305 /* Set user status bit#13 during wait for time */
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#define DMD_CMD_WAIT_TIME_USER_CHANNEL_14 306 /* Set user status bit#14 during wait for time */
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#define DMD_CMD_WAIT_TIME_USER_CHANNEL_15 307 /* Set user status bit#15 during wait for time */
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|
#define DMD_CMD_WAITING_REC_04 254 /* waiting record 04 */
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|
#define DMD_CMD_WAITING_REC_12 252 /* waiting record 12 */
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#define DMD_CMD_WAITING_REC_14 253 /* waiting record 14 */
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#define DMD_CMD_XOR_NOT_REGISTER 100 /* XOR NOT register */
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#define DMD_CMD_XOR_REGISTER 99 /* XOR register */
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#endif /* DMD_OO_API */
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|
|
/*------------------------------------------------------------------------------
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|
|
* drive parameters numbers
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_PPK_ANALOG_OUTPUT 175 /* Analog output */
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|
#define DMD_PPK_ANR_MAX_POSITION 219 /* Anr max position */
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#define DMD_PPK_ANR_MAX_VOLTAGE 218 /* Anr max voltage */
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#define DMD_PPK_ANR_MIN_POSITION 217 /* Anr min position */
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#define DMD_PPK_ANR_MIN_VOLTAGE 216 /* Anr min voltage */
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|
#define DMD_PPK_APR_INPUT_FILTER 24 /* Apr input filter */
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|
#define DMD_KL_BRAKE_DECELERATION 206 /* Brake deceleration */
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|
#define DMD_PPK_BRAKE_DECELERATION 206 /* Brake deceleration */
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#define DMD_KF_CAME_VALUE 205 /* Came value */
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#define DMD_PPK_CAME_VALUE 205 /* Came value */
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#define DMD_PPK_CL_ADC_BITS 49 /* Current loop adc bits */
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#define DMD_KF_CL_CURRENT_LIMIT 83 /* Current loop overcurrent limit */
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#define DMD_PPK_CL_CURRENT_LIMIT 83 /* Current loop overcurrent limit */
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#define DMD_KF_CL_I2T_CURRENT_LIMIT 84 /* I2 motor rms current limit */
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#define DMD_PPK_CL_I2T_CURRENT_LIMIT 84 /* Current loop i2t rms current limit */
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#define DMD_KF_CL_I2T_TIME_LIMIT 85 /* I2t motor integration limit */
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#define DMD_PPK_CL_I2T_TIME_LIMIT 85 /* Current loop i2t time limit */
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#define DMD_PPK_CL_INPUT_FILTER 10 /* Current loop input filter */
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#define DMD_KF_CL_INTEGRATOR_GAIN 81 /* Current loop integrator gain */
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#define DMD_PPK_CL_INTEGRATOR_GAIN 81 /* Current loop integrator gain */
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#define DMD_PPK_CL_OUTPUT_FILTER 82 /* Current loop output filter */
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#define DMD_PPK_CL_PHASE_ADVANCE_FACTOR 23 /* Commutation phase advance factor */
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#define DMD_PPK_CL_PHASE_ADVANCE_SHIFT 25 /* Current loop phase advance shift */
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#define DMD_KF_CL_PROPORTIONAL_GAIN 80 /* Current loop proportional gain */
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#define DMD_PPK_CL_PROPORTIONAL_GAIN 80 /* Current loop proportional gain */
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#define DMD_PPK_CL_REGEN_MODE 86 /* Current loop regeneration mode */
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#define DMD_PPK_CONCATENATED_MVT 201 /* Concatenated movement */
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#define DMD_KF_CTRL_GAIN 224 /* External reference gain */
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#define DMD_PPK_CTRL_GAIN 224 /* Control source gain */
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#define DMD_PPK_CTRL_OFFSET 223 /* External reference offset */
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#define DMD_PPK_CTRL_SHIFT_FACTOR 222 /* Control source shift factor */
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#define DMD_PPK_CTRL_SOURCE_DEPTH 222 /* External reference depth */
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#define DMD_PPK_CTRL_SOURCE_INDEX 221 /* External reference index */
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#define DMD_PPK_CTRL_SOURCE_TYPE 220 /* External reference type */
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#define DMD_PPK_CUSTOM_SETTINGS_VERSION 245 /* Customer settings version */
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#define DMD_PPK_DIGITAL_OUTPUT 171 /* Digital outputs */
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#define DMD_PPK_DISPLAY_MODE 66 /* Display mode */
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#define DMD_PPK_DRIVE_CONTROL_MODE 61 /* Position reference mode */
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#define DMD_PPK_DRIVE_FAST_SEQ_MODE 63 /* Sequence fast execution mode */
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#define DMD_PPK_DRIVE_FUSE_CHECKING 140 /* Drive fuse checking */
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#define DMD_C_DRIVE_NAME 3 /* Controller name */
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#define DMD_PPK_DRIVE_NAME 244 /* Controller name */
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#define DMD_PPK_DRIVE_PL_CYCLE_TIME 88 /* Int pos ctrl 0=166,1=125,2=83us */
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#define DMD_PPK_DRIVE_SLS_MODE 145 /* Searches limit stroke (SLS) mode */
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#define DMD_PPK_DRIVE_SP_FACTOR 64 /* Drive SP calculator factor */
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#define DMD_PPK_EBL_BAUDRATE 195 /* EBL baudrate */
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#define DMD_PPK_EBL_INTRA_FRAME_TIMEOUT 196 /* EBL intra-frame timeout */
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#define DMD_PPK_ENABLE_INPUT_MODE 33 /* Enables input mode */
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#define DMD_PPK_ENCODER_HALL_PHASE_ADJ 86 /* Digital Hall sensor phase adjustment */
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#define DMD_PPK_ENCODER_INDEX_DISTANCE 75 /* Distance between two indexes */
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#define DMD_PPK_ENCODER_INVERSION 68 /* Encoder reading way inversion */
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#define DMD_PPK_ENCODER_IPOL_SHIFT 77 /* Encoder interpolation shift value */
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#define DMD_PPK_ENCODER_MOTOR_RATIO 51 /* Encoder motor ratio */
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#define DMD_PPK_ENCODER_MUL_SHIFT 78 /* Encoder multiplication shift value */
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#define DMD_PPK_ENCODER_PERIOD 241 /* Encoder period */
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#define DMD_KF_ENCODER_PHASE_1_FACTOR 72 /* Analog encoder sine factor */
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#define DMD_PPK_ENCODER_PHASE_1_FACTOR 72 /* Analog encoder sine factor */
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#define DMD_PPK_ENCODER_PHASE_1_OFFSET 70 /* Analog encoder sine offset */
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#define DMD_KF_ENCODER_PHASE_2_FACTOR 73 /* Analog encoder cosine factor */
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#define DMD_PPK_ENCODER_PHASE_2_FACTOR 73 /* Analog encoder cosine factor */
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#define DMD_PPK_ENCODER_PHASE_2_OFFSET 71 /* Analog encoder cosine offset */
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#define DMD_PPK_ENCODER_PHASE_3_FACTOR 76 /* Encoder phase 3 factor */
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#define DMD_PPK_ENCODER_PHASE_3_OFFSET 74 /* Phase shift for analog HALL sensor */
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#define DMD_PPK_ENCODER_TURN_FACTOR 55 /* Encoder position increment factor */
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#define DMD_PPK_ENCODER_TYPE 79 /* Encoder type */
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#define DMD_PPK_END_VELOCITY 215 /* End velocity */
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#define DMD_C_FAST_OUTPUT 5 /* Fast outputs */
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#define DMD_PPK_FOLLOWING_ERROR_WINDOW 30 /* Tracking error limit */
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#define DMD_C_GANTRY_TYPE 245 /* Gantry level */
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#define DMD_PPK_GANTRY_TYPE 245 /* Axes mask for gantry function */
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#define DMD_KL_HOME_OFFSET 45 /* Offset on absolute position */
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#define DMD_PPK_HOME_OFFSET 45 /* Home offset */
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#define DMD_KL_HOMING_ACCELERATION 42 /* Homing acceleration */
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#define DMD_PPK_HOMING_ACCELERATION 42 /* Homing acceleration */
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#define DMD_KF_HOMING_CURRENT_LIMIT 44 /* Homing force limit for mech end stop detection */
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#define DMD_PPK_HOMING_CURRENT_LIMIT 44 /* Homing force limit for mech end stop detection */
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#define DMD_PPK_HOMING_FINE_TUNING_MODE 52 /* Homing fine tuning mode */
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#define DMD_PPK_HOMING_FINE_TUNING_VALUE 53 /* Homing fine tuning value */
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#define DMD_KL_HOMING_FIXED_MVT 46 /* Homing movement stroke */
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#define DMD_PPK_HOMING_FIXED_MVT 46 /* Homing movement stroke */
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#define DMD_KL_HOMING_FOLLOWING_LIMIT 43 /* Homing track limit for mech end stop detection */
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#define DMD_PPK_HOMING_FOLLOWING_LIMIT 43 /* Homing track limit for mech end stop detection */
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#define DMD_KL_HOMING_INDEX_MVT 48 /* Mvt to go out of idx/home switch */
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#define DMD_PPK_HOMING_INDEX_MVT 48 /* Mvt to go out of idx/home switch */
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#define DMD_PPK_HOMING_METHOD 40 /* Homing mode */
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#define DMD_KL_HOMING_SWITCH_MVT 47 /* Mvt to go out of limit switch or mech end stop */
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#define DMD_PPK_HOMING_SWITCH_MVT 47 /* Mvt to go out of limit switch or mech end stop */
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#define DMD_KL_HOMING_ZERO_SPEED 41 /* Homing speed */
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#define DMD_PPK_HOMING_ZERO_SPEED 41 /* Homing speed */
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#define DMD_PPK_INDIRECT_AXIS_NUMBER 197 /* Indirect axis number */
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#define DMD_PPK_INDIRECT_REGISTER_IDX 198 /* Indirect register index */
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#define DMD_PPK_INDIRECT_REGISTER_SIDX 199 /* Indirect register subindex */
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#define DMD_PPK_INIT_CURRENT_RATE 95 /* Initialisation current rate */
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#define DMD_PPK_INIT_FINAL_PHASE 93 /* Phasing final phase */
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#define DMD_PPK_INIT_INITIAL_PHASE 97 /* Phasing initial phase */
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#define DMD_KF_INIT_MAX_CURRENT 92 /* Phasing constant current level */
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#define DMD_PPK_INIT_MAX_CURRENT 92 /* Phasing constant current level */
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#define DMD_PPK_INIT_MODE 90 /* Phasing mode */
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#define DMD_PPK_INIT_PHASE_RATE 96 /* Initialisation phase rate */
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#define DMD_KF_INIT_PULSE_LEVEL 91 /* Phasing pulse level */
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#define DMD_PPK_INIT_PULSE_LEVEL 91 /* Phasing pulse level */
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#define DMD_PPK_INIT_TIME 94 /* Phasing time (K90 = 2) */
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#define DMD_PPK_INIT_VOLTAGE_RATE 98 /* Phasing voltage rate */
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#define DMD_PPK_INTERRUPT_MASK_1 180 /* Interrupt mask 1 */
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#define DMD_PPK_INTERRUPT_MASK_2 181 /* Interrupt mask 2 */
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#define DMD_PPK_IO_ERROR_EVENT_MASK 37 /* DOUT mask error event */
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#define DMD_PPK_IPOL_CAME_VALUE 717 /* Interpolation, came value */
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#define DMD_PPK_IPOL_LKT_CYCLIC_MODE 710 /* Interpolation, LKT, cyclic mode */
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#define DMD_PPK_IPOL_LKT_RELATIVE_MODE 711 /* Interpolation, LKT, relative mode */
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#define DMD_PPK_IPOL_LKT_SPEED_RATIO 700 /* Interpolation, LKT, speed ratio of the pointer */
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#define DMD_PPK_IPOL_VELOCITY_RATE 530 /* Interpolation, speed rate */
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#define DMD_PPK_JERK_FILTER_TIME 213 /* Jerk time */
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#define DMD_PPK_MAX_ACCELERATION 29 /* Max acceleration */
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#define DMD_PPK_MAX_POSITION_RANGE_LIMIT 27 /* Max position range limit */
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#define DMD_PPK_MAX_PROFILE_VELOCITY 28 /* Max profile velocity */
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#define DMD_KL_MAX_SOFT_POSITION_LIMIT 35 /* Max software position limit */
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#define DMD_PPK_MAX_SOFT_POSITION_LIMIT 35 /* Max software position limit */
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#define DMD_PPK_MEASURE_DRIVE_CL_INT 234 /* Timing measurement for current interrupt */
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#define DMD_PPK_MEASURE_DRIVE_PL_INT 235 /* Timing measurement for slow interrupt */
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#define DMD_PPK_MEASURE_DRIVE_SP_INT 236 /* Timing measurement for fast interrupt */
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#define DMD_PPK_MIN_POSITION_RANGE_LIMIT 26 /* Min position range limit */
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#define DMD_KL_MIN_SOFT_POSITION_LIMIT 34 /* Min software position limit */
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#define DMD_PPK_MIN_SOFT_POSITION_LIMIT 34 /* Min software position limit */
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#define DMD_PPK_MON_DEST_INDEX 153 /* Monitoring destination index */
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#define DMD_PPK_MON_DEST_TYPE 152 /* Monitoring destination type */
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#define DMD_PPK_MON_GAIN 155 /* Optional board source register gain */
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#define DMD_PPK_MON_OFFSET 154 /* Optional board source register offset */
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#define DMD_PPK_MON_SOURCE_AXIS 158 /* Optional board source register selection */
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#define DMD_C_MON_SOURCE_INDEX 31 /* XAOUT source register index */
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#define DMD_PPK_MON_SOURCE_INDEX 151 /* Optional board source register index */
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#define DMD_C_MON_SOURCE_TYPE 30 /* XAOUT source register type */
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#define DMD_PPK_MON_SOURCE_TYPE 150 /* Optional board source register type */
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#define DMD_PPK_MOTION_AND_CONSIGNE 78 /* Regulator type */
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#define DMD_PPK_MOTOR_DIV_FACTOR 243 /* Position division factor */
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#define DMD_PPK_MOTOR_KT_FACTOR 239 /* Motor Kt factor */
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#define DMD_PPK_MOTOR_MUL_FACTOR 242 /* Position multiplication factor */
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#define DMD_PPK_MOTOR_PHASE_CORRECTION 56 /* Motor phase correction */
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#define DMD_PPK_MOTOR_PHASE_NB 89 /* Motor phase number and PWM frequency */
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#define DMD_PPK_MOTOR_POLE_NB 54 /* Motor pair pole number */
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#define DMD_PPK_MOTOR_TEMP_CHECKING 141 /* Enables motor temperature checking */
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#define DMD_PPK_MOTOR_TYPE 240 /* Movement type conversion */
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#define DMD_PPK_MVT_DIRECTION 209 /* Rotary movement type */
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#define DMD_KL_MVT_LKT_AMPLITUDE 208 /* Max stroke for LKT */
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#define DMD_PPK_MVT_LKT_AMPLITUDE 208 /* Max stroke for LKT */
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#define DMD_PPK_MVT_LKT_NUMBER 203 /* LKT number movement */
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#define DMD_PPK_MVT_LKT_TIME 204 /* Movement LKT time */
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#define DMD_PPK_MVT_LKT_TYPE 207 /* LKT mode selection */
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#define DMD_PPK_PDR_STEP_VALUE 69 /* TTL encoder interpolation shift value */
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#define DMD_KF_PL_ACC_FEEDFORWARD_GAIN 21 /* Position loop acceleration ffwd gain */
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#define DMD_PPK_PL_ACC_FEEDFORWARD_GAIN 21 /* Position loop acceleration ffwd gain */
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#define DMD_PPK_PL_ACC_FEEDFORWARD_GAIN_ 18 /* Acceleration ffwd in pulse/dir mode */
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#define DMD_KF_PL_ANTI_WINDUP_GAIN 5 /* Position loop anti-windup gain */
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#define DMD_PPK_PL_ANTI_WINDUP_GAIN 5 /* Position loop anti-windup gain */
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#define DMD_PPK_PL_FORCE_FEEDBACK_GAIN_1 3 /* Position loop force feedback gain 1 */
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#define DMD_PPK_PL_FORCE_FEEDBACK_GAIN_2 13 /* Position loop force feedback gain 2 */
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#define DMD_KF_PL_INTEGRATOR_GAIN 4 /* Position loop integrator gain */
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#define DMD_PPK_PL_INTEGRATOR_GAIN 4 /* Position loop integrator gain */
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#define DMD_KF_PL_INTEGRATOR_LIMITATION 6 /* Position loop integrator limitation */
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#define DMD_PPK_PL_INTEGRATOR_LIMITATION 6 /* Position loop integrator limitation */
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#define DMD_PPK_PL_INTEGRATOR_MODE 7 /* Position loop integrator mode */
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#define DMD_PPK_PL_OUTPUT_FILTER 9 /* Position loop output filter */
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#define DMD_KF_PL_PROPORTIONAL_GAIN 1 /* Position loop proportional gain */
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#define DMD_PPK_PL_PROPORTIONAL_GAIN 1 /* Position loop proportional gain */
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#define DMD_KF_PL_SPEED_FEEDBACK_GAIN 2 /* Position loop speed feedback gain */
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#define DMD_PPK_PL_SPEED_FEEDBACK_GAIN 2 /* Position loop speed feedback gain */
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#define DMD_PPK_PL_SPEED_FEEDFWD_GAIN 20 /* Position loop speed ffwd gain */
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#define DMD_PPK_PL_SPEED_FEEDFWD_GAIN_PD 17 /* Speed ffwd in pulse/dir mode */
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#define DMD_PPK_PL_SPEED_FILTER 8 /* Position loop speed filter */
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#define DMD_PPK_PL_SPEED_FILTER_2 12 /* Speed filter 2 */
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#define DMD_PPK_POSITION_WINDOW 39 /* In-window position */
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#define DMD_PPK_POSITION_WINDOW_TIME 38 /* In-window time */
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#define DMD_KL_PROFILE_ACCELERATION 212 /* Absolute max acc/deceleration */
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#define DMD_PPK_PROFILE_ACCELERATION 212 /* Absolute max acc/deceleration */
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#define DMD_PPK_PROFILE_DECELERATION 214 /* Profile deceleration */
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#define DMD_PPK_PROFILE_LIMIT_MODE 36 /* Enables position limit (KL34, KL35) */
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#define DMD_PPK_PROFILE_MUL_SHIFT 50 /* Profile multiplication shift */
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#define DMD_PPK_PROFILE_TYPE 202 /* Movement type */
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#define DMD_KL_PROFILE_VELOCITY 211 /* Absolute max speed */
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#define DMD_PPK_PROFILE_VELOCITY 211 /* Absolute max speed */
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#define DMD_PPK_REALTIME_ENABLED_GLOBAL 190 /* RTI global enable */
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#define DMD_PPK_REALTIME_ENABLED_MASK 192 /* RTI enabled mask */
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#define DMD_PPK_REALTIME_PENDING_MASK 193 /* RTI pending mask */
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#define DMD_PPK_REALTIME_VALID_MASK 191 /* RTI valid mask */
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#define DMD_PPK_REFERENCE_MODE 61 /* Reference mode */
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#define DMD_KF_SOFTWARE_CURRENT_LIMIT 60 /* Software force limit */
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#define DMD_PPK_SOFTWARE_CURRENT_LIMIT 60 /* Software force/torque limit */
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#define DMD_PPK_SWITCH_LIMIT_MODE 32 /* Limit switch and home switch inversion */
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#define DMD_PPK_SYNCRO_INPUT_MASK 160 /* Syncro input mask */
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#define DMD_PPK_SYNCRO_INPUT_VALUE 161 /* Syncro input value */
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#define DMD_PPK_SYNCRO_OUTPUT_MASK 162 /* Syncro output mask */
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#define DMD_PPK_SYNCRO_OUTPUT_VALUE 163 /* Syncro output value */
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#define DMD_PPK_SYNCRO_START_TIMEOUT 164 /* Synchro timeout */
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#define DMD_KL_TARGET_POSITION 210 /* Target position */
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#define DMD_PPK_TARGET_POSITION 210 /* Target position */
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#define DMD_PPK_TRIGGER_IO_MASK 185 /* Trigger digital output mask */
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#define DMD_PPK_TRIGGER_IRQ_MASK 184 /* User status mask for trigger */
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#define DMD_PPK_TRIGGER_MAP_OFFSET 186 /* Trigger mapping number */
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#define DMD_PPK_TRIGGER_MAP_SIZE 187 /* Trigger mapping size */
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#define DMD_PPK_TTL_SPECIAL_FILTER 11 /* TTL special filter */
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#define DMD_PPK_UFAI_TEN_POWER 525 /* Ufai ten power */
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#define DMD_PPK_UFPI_MUL_FACTOR 522 /* Ufpi multiplication factor */
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#define DMD_PPK_UFPI_TEN_POWER 523 /* Ufpi ten power */
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#define DMD_PPK_UFSI_TEN_POWER 524 /* Ufsi ten power */
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#define DMD_PPK_UFTI_TEN_POWER 526 /* Ufti ten power */
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#define DMD_PPK_USER_STATUS 177 /* User status */
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#define DMD_PPK_VELOCITY_ERROR_LIMIT 31 /* Speed error limit */
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#define DMD_PPK_X_ANALOG_GAIN 157 /* Optional board analog gain */
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#define DMD_PPK_X_ANALOG_OFFSET 156 /* Optional board analog offset */
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#define DMD_C_X_ANALOG_OUTPUT_1 7 /* Optional board analog outputs */
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#define DMD_PPK_X_ANALOG_OUTPUT_1 173 /* Optional board analog outputs 1 */
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#define DMD_PPK_X_ANALOG_OUTPUT_2 174 /* Optional board analog outputs 2 */
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#define DMD_C_X_DIGITAL_OUTPUT 6 /* Optional board digital outputs */
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#define DMD_PPK_X_DIGITAL_OUTPUT 172 /* Optional board digital outputs */
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#endif /* DMD_OO_API */
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/*------------------------------------------------------------------------------
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|
|
* drive monitoring variables numbers
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|
|
*-----------------------------------------------------------------------------*/
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|
|
#ifndef DMD_OO_API
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#define DMD_MON_ACC_ACTUAL_VALUE 15 /* Real acceleration (dai) */
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#define DMD_MON_ACC_DEMAND_VALUE 14 /* Theoretical acceleration (dai) */
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#define DMD_MON_ACK_DRIVE_STATUS_1 162 /* Acknowledge drive status 1 */
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#define DMD_MON_ACK_DRIVE_STATUS_2 163 /* Acknowledge drive status 2 */
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#define DMD_MON_ANALOG_INPUT 51 /* Analog input */
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#define DMD_MON_ANALOG_INPUT_AUX 52 /* Analog input auxiliary */
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#define DMD_MON_AUX_ENCODER_1VPTP_VALUE 133 /* Analog auxiliary encoder sine^2 + cosine^2 */
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#define DMD_MON_AUX_ENCODER_COSINE_SIGNA 131 /* Analog auxiliary encoder cosine signal */
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#define DMD_MON_AUX_ENCODER_INDEX_SIGNAL 132 /* Analog auxiliary encoder index signal */
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#define DMD_MON_AUX_ENCODER_SINE_SIGNAL 130 /* Analog auxiliary encoder sine signal */
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#define DMD_MON_AUXILIARY_ENCODER_LIMIT_ 134 /* Auxiliary encoder limit switch */
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#define DMD_MON_AXIS_NUMBER 87 /* Axis number */
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#define DMD_MON_CAN_FEEDBACK_1 250 /* Optional board feedback 1 */
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#define DMD_MON_CAN_FEEDBACK_2 251 /* Optional board feedback 2 */
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#define DMD_MF_CL_ACTUAL_VALUE 31 /* Real force Iq measured */
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#define DMD_MON_CL_ACTUAL_VALUE 31 /* Real force */
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#define DMD_MF_CL_CURRENT_PHASE_1 20 /* Real current in phase 1 */
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#define DMD_MON_CL_CURRENT_PHASE_1 20 /* Real current in phase 1 */
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#define DMD_MF_CL_CURRENT_PHASE_2 21 /* Real current in phase 2 */
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#define DMD_MON_CL_CURRENT_PHASE_2 21 /* Real current in phase 2 */
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#define DMD_MF_CL_CURRENT_PHASE_3 22 /* Real current in phase 3 */
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#define DMD_MON_CL_CURRENT_PHASE_3 22 /* Real current in phase 3 */
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#define DMD_MF_CL_DEMAND_VALUE 30 /* Theoretical force Iq for current loop */
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#define DMD_MON_CL_DEMAND_VALUE 30 /* Theoretical force */
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#define DMD_MF_CL_I2T_VALUE 67 /* I2t motor current value */
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#define DMD_MON_CL_I2T_VALUE 67 /* Current loop i2t value */
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#define DMD_MON_CL_LKT_PHASE_1 25 /* Current loop LKT phase 1 */
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#define DMD_MON_CL_LKT_PHASE_2 26 /* Current loop LKT phase 2 */
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#define DMD_MON_CL_LKT_PHASE_3 27 /* Current loop LKT phase 3 */
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#define DMD_MON_CL_LKT_PHASES 25 /* Phase angle */
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|
|
#define DMD_MON_COMMON_FAST_INPUTS 52 /* Common fast inputs */
|
|
|
#define DMD_MON_DAISY_CHAIN_NUMBER 88 /* Daisy chain number */
|
|
|
#define DMD_MON_DIGITAL_INPUT 50 /* Digital inputs */
|
|
|
#define DMD_MON_DIGITAL_OUTPUT_ACTUAL 171 /* Digital outputs */
|
|
|
#define DMD_MON_DRIVE_CL_INT_ACTUAL_TIME 190 /* Actual time of process on current loop */
|
|
|
#define DMD_MON_DRIVE_CL_INT_MAX_TIME 192 /* Min time of process on current loop */
|
|
|
#define DMD_MON_DRIVE_CL_INT_MIN_TIME 191 /* Max time of process on current loop */
|
|
|
#define DMD_MON_DRIVE_CL_TIME_FACTOR 243 /* Controller current loop time factor */
|
|
|
#define DMD_MON_DRIVE_CONTROL_MODE_BF 19 /* Control mode bit-field */
|
|
|
#define DMD_MON_DRIVE_DISPLAY 95 /* Display's string */
|
|
|
#define DMD_MON_DRIVE_FUSE_STATUS 140 /* Drive fuse status */
|
|
|
#define DMD_MON_DRIVE_MASK_VALUE 93 /* Drive mask value */
|
|
|
#define DMD_MF_DRIVE_MAX_CURRENT 82 /* Controller max current */
|
|
|
#define DMD_MON_DRIVE_MAX_CURRENT 82 /* Controller max current */
|
|
|
#define DMD_MON_DRIVE_PENDING_BPT 98 /* Pending breakpoints */
|
|
|
#define DMD_MON_DRIVE_PL_INT_ACTUAL_TIME 193 /* Actual time of process on position loop */
|
|
|
#define DMD_MON_DRIVE_PL_INT_MAX_TIME 195 /* Min time of process on position loop */
|
|
|
#define DMD_MON_DRIVE_PL_INT_MIN_TIME 194 /* Max time of process on position loop */
|
|
|
#define DMD_MON_DRIVE_PL_TIME_FACTOR 244 /* Controller position loop time factor */
|
|
|
#define DMD_MON_DRIVE_QUARTZ_FREQUENCY 242 /* Controller quartz frequency [Hz] */
|
|
|
#define DMD_MON_DRIVE_SEQUENCE_LINE 96 /* Current instruction address */
|
|
|
#define DMD_MON_DRIVE_SEQUENCE_USAGE 97 /* Drive sequence buffer usage */
|
|
|
#define DMD_MON_DRIVE_SP_INT_ACTUAL_TIME 196 /* Actual time of process on manager loop */
|
|
|
#define DMD_MON_DRIVE_SP_INT_MAX_TIME 198 /* Min time of process on manager loop */
|
|
|
#define DMD_MON_DRIVE_SP_INT_MIN_TIME 197 /* Max time of process on manager loop */
|
|
|
#define DMD_MON_DRIVE_SP_TIME_FACTOR 245 /* Controller manager loop time factor */
|
|
|
#define DMD_MON_DRIVE_STATUS_1 60 /* Controller status 1 */
|
|
|
#define DMD_MON_DRIVE_STATUS_2 61 /* Controller status 2 */
|
|
|
#define DMD_MON_DRIVE_TEMPERATURE 90 /* Controller temperature */
|
|
|
#define DMD_MON_EB_RUNNING 89 /* Etel-bus running */
|
|
|
#define DMD_MON_ENC_COS_SIG_OTHER_AXIS 233 /* Analog encoder cosine signal of the other axis */
|
|
|
#define DMD_MON_ENCODER_1VPTP_VALUE 43 /* Analog encoder sine^2 + cosine^2 */
|
|
|
#define DMD_MON_ENCODER_COSINE_SIGNAL 41 /* Analog encoder cosine signal */
|
|
|
#define DMD_MON_ENCODER_HALL_1_SIGNAL 45 /* Encoder HALL analog signal 1 */
|
|
|
#define DMD_MON_ENCODER_HALL_2_SIGNAL 46 /* Encoder HALL analog signal 2 */
|
|
|
#define DMD_MON_ENCODER_HALL_3_SIGNAL 47 /* Encoder HALL analog signal 3 */
|
|
|
#define DMD_MON_ENCODER_HALL_DIG_SIGNAL 48 /* Digital HALL effect sensor */
|
|
|
#define DMD_MON_ENCODER_INDEX_SIGNAL 42 /* Analog encoder index signal */
|
|
|
#define DMD_MON_ENCODER_IPOL_FACTOR 241 /* Encoder interpolation factor */
|
|
|
#define DMD_MON_ENCODER_LIMIT_SWITCH 44 /* Encoder limit switch */
|
|
|
#define DMD_MON_ENCODER_SINE_SIGNAL 40 /* Analog encoder sine signal */
|
|
|
#define DMD_MON_ERROR_CODE 64 /* Error code */
|
|
|
#define DMD_MON_FDOUT_ACTUAL 172 /* Fast digital outputs */
|
|
|
#define DMD_MON_HOMING_STATUS 159 /* Homing status */
|
|
|
#define DMD_MON_INDIRECT_AXIS_MASK 94 /* Drive mask for generic command */
|
|
|
#define DMD_MON_INFO_BOOT_REVISION 71 /* Boot version */
|
|
|
#define DMD_MON_INFO_C_SOFT_BUILD_TIME 74 /* Firmware build time */
|
|
|
#define DMD_MON_INFO_P_SOFT_BUILD_TIME 75 /* FPGA build time */
|
|
|
#define DMD_MON_INFO_PRODUCT_NUMBER 70 /* Product type */
|
|
|
#define DMD_MON_INFO_PRODUCT_STRING 85 /* Article number */
|
|
|
#define DMD_MON_INFO_SERIAL_NUMBER 73 /* Serial number */
|
|
|
#define DMD_MON_INFO_SOFT_VERSION 72 /* Firmware version */
|
|
|
#define DMD_MON_IRQ_DRIVE_STATUS_1 160 /* Interrupt drive status 1 */
|
|
|
#define DMD_MON_IRQ_DRIVE_STATUS_2 161 /* Interrupt drive status 2 */
|
|
|
#define DMD_MON_IRQ_PENDING_AXIS_MASK 164 /* Interrupt pending axes mask */
|
|
|
#define DMD_ML_MAX_SLS_POSITION_LIMIT 37 /* Superior position after SLS cmd */
|
|
|
#define DMD_MON_MAX_SLS_POSITION_LIMIT 37 /* Superior position after SLS cmd */
|
|
|
#define DMD_ML_MIN_SLS_POSITION_LIMIT 36 /* Inferior position after SLS cmd */
|
|
|
#define DMD_MON_MIN_SLS_POSITION_LIMIT 36 /* Inferior position after SLS cmd */
|
|
|
#define DMD_MON_PDR_ACC_DEMAND_VALUE 35 /* Theo.acceleration (pulse/dir) */
|
|
|
#define DMD_MON_PDR_POSITION_VALUE 17 /* Reference value for mode k61=0,1,4,36 */
|
|
|
#define DMD_MON_PDR_VELOCITY_DEMAND_VALU 34 /* Theoretical speed (pulse/dir) */
|
|
|
#define DMD_ML_POSITION_ACTUAL_VALUE_DS 1 /* Real position with mapping (dpi) */
|
|
|
#define DMD_MON_POSITION_ACTUAL_VALUE_DS 1 /* Real position with mapping (dpi) */
|
|
|
#define DMD_ML_POSITION_ACTUAL_VALUE_US 7 /* Real position */
|
|
|
#define DMD_MON_POSITION_ACTUAL_VALUE_US 7 /* Real position */
|
|
|
#define DMD_MON_POSITION_CTRL_ERROR 2 /* Tracking error */
|
|
|
#define DMD_ML_POSITION_DEMAND_VALUE_DS 0 /* Theoretical position (dpi) */
|
|
|
#define DMD_MON_POSITION_DEMAND_VALUE_DS 0 /* Theoretical position (dpi) */
|
|
|
#define DMD_ML_POSITION_DEMAND_VALUE_US 6 /* Theoretical position */
|
|
|
#define DMD_MON_POSITION_DEMAND_VALUE_US 6 /* Theoretical position */
|
|
|
#define DMD_MON_POSITION_MAX_ERROR 3 /* Max tracking error */
|
|
|
#define DMD_MON_POWER_SUPPLY_STATUS 68 /* Power Supply status */
|
|
|
#define DMD_MON_REF_DEMAND_VALUE 18 /* Reference demand value */
|
|
|
#define DMD_ML_TEB_NODE_MASK 512 /* Present nodes on TransnET */
|
|
|
#define DMD_MON_TEB_NODE_MASK 512 /* Present nodes on TEB */
|
|
|
#define DMD_MON_VELOCITY_ACTUAL_VALUE 11 /* Real speed after adv filter (dsi) */
|
|
|
#define DMD_MON_VELOCITY_BEFORE_K8 111 /* Real speed before adv filter depth 0 (dsi) */
|
|
|
#define DMD_MON_VELOCITY_DEMAND_VALUE 10 /* Theoretical speed after adv filter (dsi) */
|
|
|
#define DMD_MON_VELOCITY_SECONDARY_ACTUA 19 /* Second encoder real velocity (dsi) */
|
|
|
#define DMD_MON_X_ANALOG_INPUT_1 56 /* Optional board analog inputs */
|
|
|
#define DMD_MON_X_ANALOG_INPUT_2 57 /* Optional board analog input 2 */
|
|
|
#define DMD_MON_X_DIGITAL_INPUT 55 /* Optional board digital inputs */
|
|
|
#define DMD_MON_X_INFO_BOOT_REVISION 77 /* Optional board boot version */
|
|
|
#define DMD_MON_X_INFO_PRODUCT_NUMBER 76 /* Optional board product number */
|
|
|
#define DMD_MON_X_INFO_PRODUCT_STRING 86 /* Optional board article number */
|
|
|
#define DMD_MON_X_INFO_SERIAL_NUMBER 79 /* Optional board serial number */
|
|
|
#define DMD_MON_X_INFO_SOFT_BUILD_TIME 80 /* Optional board firmware buildtime */
|
|
|
#define DMD_MON_X_INFO_SOFT_VERSION 78 /* Optional board firmware version */
|
|
|
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* convertion constants
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD_OO_API
|
|
|
#define DMD_CONV_DWORD 0 /* double word value without conversion */
|
|
|
#define DMD_CONV_BOOL 1 /* boolean value */
|
|
|
#define DMD_CONV_INT 2 /* integer value without conversion */
|
|
|
#define DMD_CONV_K14 3 /* */
|
|
|
#define DMD_CONV_K8 3 /* */
|
|
|
#define DMD_CONV_LONG 3 /* long integer value without conversion */
|
|
|
#define DMD_CONV_STRING 4 /* packed string value */
|
|
|
#define DMD_CONV_FLOAT 5 /* float value */
|
|
|
#define DMD_CONV_KFLOAT 6 /* float value for K parameters */
|
|
|
#define DMD_CONV_M29 7 /* per cent unit, 100% correspond to value of M229 */
|
|
|
#define DMD_CONV_CTRL_CUR2 8 /* Controller i<SUP>2</SUP>t, dissipation value */
|
|
|
#define DMD_CONV_UPI2 9 /* user position increment dual encodeur mode */
|
|
|
#define DMD_CONV_UPI 10 /* user position increment */
|
|
|
#define DMD_CONV_USI 11 /* user speed increment */
|
|
|
#define DMD_CONV_UAI 12 /* acceleration, user acceleration increment */
|
|
|
#define DMD_CONV_IP_ADDRESS 13 /* ip address type */
|
|
|
#define DMD_CONV_CTRL_CUR2T 14 /* Controller i<SUP>2</SUP>t, integration value */
|
|
|
#define DMD_CONV_DPI 15 /* drive position increment */
|
|
|
#define DMD_CONV_DSI 16 /* drive speed increment */
|
|
|
#define DMD_CONV_DAI 17 /* drive acceleration increment */
|
|
|
#define DMD_CONV_DPI2 18 /* drive position increment for secondary encoder */
|
|
|
#define DMD_CONV_CUR2T_V2 19 /* i<SUP>2</SUP>t, integration value */
|
|
|
#define DMD_CONV_C13 20 /* current 13bit range */
|
|
|
#define DMD_CONV_C14 21 /* current 14bit range */
|
|
|
#define DMD_CONV_C29 22 /* current 29bit range */
|
|
|
#define DMD_CONV_CUR 24 /* current */
|
|
|
#define DMD_CONV_CUR2 25 /* i<SUP>2</SUP>, dissipation value */
|
|
|
#define DMD_CONV_CUR2T 26 /* i<SUP>2</SUP>t, integration value */
|
|
|
#define DMD_CONV_POLE_FREQ 27 /* filter pole frequency in Herz */
|
|
|
#define DMD_CONV_M82 28 /* current limit in 10 mA unit, 100 correspond to 1.0A */
|
|
|
#define DMD_CONV_MLTI 30 /* manager loop time increment (sti) */
|
|
|
#define DMD_CONV_STI 30 /* slow time increment (500us-2ms) */
|
|
|
#define DMD_CONV_FTI 31 /* fast time increment (125us-166us) */
|
|
|
#define DMD_CONV_PLTI 31 /* position loop time increment (fti) */
|
|
|
#define DMD_CONV_CLTI 32 /* current loop time increment (cti) */
|
|
|
#define DMD_CONV_CTI 32 /* current loop time increment (41us) */
|
|
|
#define DMD_CONV_EXP10 33 /* ten power factor */
|
|
|
#define DMD_CONV_HSTI 34 /* half slow time increment */
|
|
|
#define DMD_CONV_M242 35 /* quartz frequency in Hz */
|
|
|
#define DMD_CONV_QZTIME 36 /* interrupt time in sec = inc / m242 */
|
|
|
#define DMD_CONV_SPEC2F 37 /* filter time, T = [fti] * (2<SUP>n</SUP>-1) */
|
|
|
#define DMD_CONV_TEMP 38 /* 2<SUP>0</SUP> = 1 correspond to 1.0 */
|
|
|
#define DMD_CONV_UFTI 39 /* user friendly time increment */
|
|
|
#define DMD_CONV_AVI 40 /* analog voltage increment 8192 correspond to -10V -8192 correspond to +10V */
|
|
|
#define DMD_CONV_VOLT 41 /* 2<SUP>0</SUP> = 1 correspond to 1.0 */
|
|
|
#define DMD_CONV_ENCOFF 42 /* 11bit with 2048 offset */
|
|
|
#define DMD_CONV_VOLT100 43 /* (2<SUP>0</SUP>)/100 = 1 correspond to 1.0 */
|
|
|
#define DMD_CONV_PH11 44 /* 2<SUP>11</SUP> = 2048 correspond to 360<36> */
|
|
|
#define DMD_CONV_PH12 45 /* 2<SUP>12</SUP> = 4096 correspond to 360<36> */
|
|
|
#define DMD_CONV_PH28 46 /* 2<SUP>28</SUP> = 65536*4096 correspond to 360<36> */
|
|
|
#define DMD_CONV_AVI12BIT 47 /* analog voltage increment 2048 correspond to -10V -2048 correspond to +10V */
|
|
|
#define DMD_CONV_AVI16BIT 48 /* analog voltage increment 32767 correspond to -10V -32768 correspond to +10V */
|
|
|
#define DMD_CONV_AVI16BITINV 49 /* analog voltage increment 32767 correspond to 10V -32768 correspond to -10V */
|
|
|
#define DMD_CONV_BIT0 50 /* 2<SUP>0</SUP> = 1 correspond to 1.0 */
|
|
|
#define DMD_CONV_BIT5 55 /* 2<SUP>5</SUP> = 32 correspond to 1.0 */
|
|
|
#define DMD_CONV_BIT8 58 /* 2<SUP>8</SUP> = 256 correspond to 1.0 */
|
|
|
#define DMD_CONV_BIT9 59 /* 2<SUP>9</SUP> = 512 correspond to 1.0 */
|
|
|
#define DMD_CONV_BIT10 60 /* 2<SUP>10</SUP> = 1024 correspond to 1.0 */
|
|
|
#define DMD_CONV_BIT11 61 /* 2<SUP>11</SUP> = 2048 correspond to 1.0 */
|
|
|
#define DMD_CONV_BIT11_ENCODER 62 /* Analgog encoder signal amplitude in volt (11 bit) */
|
|
|
#define DMD_CONV_BIT15_ENCODER 63 /* Analgog encoder signal amplitude in volt (15 bit) */
|
|
|
#define DMD_CONV_BIT15 65 /* 2<SUP>15</SUP> = 32768 correspond to 1.0 */
|
|
|
#define DMD_CONV_BIT24 74 /* 2<SUP>24</SUP> = 256*65536 correspond to 1.0 */
|
|
|
#define DMD_CONV_BIT31 81 /* 2<SUP>31</SUP> = 32768*65536 correspond to 1.0 */
|
|
|
#define DMD_CONV_BIT11P2 82 /* */
|
|
|
#define DMD_CONV_BIT15P2 83 /* */
|
|
|
#define DMD_CONV_UFPI 85 /* user friendly position increment */
|
|
|
#define DMD_CONV_UFSI 86 /* user friendly speed increment */
|
|
|
#define DMD_CONV_UFAI 87 /* user friendly acceleration increment */
|
|
|
#define DMD_CONV_MSEC 88 /* milliseconds */
|
|
|
#define DMD_CONV_K1 90 /* pl prop gain, k(A/m) = k1 * Iref * dpi_factor / 2<SUP>29</SUP> */
|
|
|
#define DMD_CONV_K2 92 /* pl speed feedback gain, k(A/(m/s)) = k2 * Iref * dsi_factor / 2<SUP>29</SUP> */
|
|
|
#define DMD_CONV_K4 94 /* pl integrator gain, k(A/(m*s)) = k1 * Iref * dpi_factor / 2<SUP>29</SUP> / pl_time */
|
|
|
#define DMD_CONV_K5 96 /* anti-windup K[m/A]=K5*4096/(dpi_factor * Iref) */
|
|
|
#define DMD_CONV_K9 98 /* 1st order filter in pl */
|
|
|
#define DMD_CONV_K10 100 /* 1st order filter in s. */
|
|
|
#define DMD_CONV_K20_DSB 102 /* speed feedback, sec unit (m/(m/s)), F = k20 / 2<SUP>16-k50</SUP> * dsi_factor / dpi_factor */
|
|
|
#define DMD_CONV_K20 103 /* speed feedback, sec unit (m/(m/s)), F = k20 / 2<SUP>16-k50</SUP> * dsi_factor / dpi_factor */
|
|
|
#define DMD_CONV_K21_DSB 104 /* speed feedback, sec unit (m/(m/s<SUP>2</SUP>)), F = k20 / 2<SUP>24-k50</SUP> * dai_factor / dpi_factor */
|
|
|
#define DMD_CONV_K21 105 /* speed feedback, sec unit (m/(m/s<SUP>2</SUP>)), F = k20 / 2<SUP>24-k50</SUP> * dai_factor / dpi_factor */
|
|
|
#define DMD_CONV_K23 106 /* commutation phase advance period/(period*second/m) */
|
|
|
#define DMD_CONV_K23_ACCURET 107 /* commutation phase advance period/(Volt*second/m) */
|
|
|
#define DMD_CONV_K75 108 /* encoder multiple index distance, 1/1024 * encoder perion unit */
|
|
|
#define DMD_CONV_K80_VHP 109 /* cl prop gain delta[V/A] */
|
|
|
#define DMD_CONV_K80 110 /* cl prop gain delta[1/A] */
|
|
|
#define DMD_CONV_K81_VHP 111 /* cl prop gain delta[V/(A*s)] */
|
|
|
#define DMD_CONV_K81 112 /* cl prop integrator delta[1/(A*s)] */
|
|
|
#define DMD_CONV_K82 114 /* filter time, T = [cti] * (2<SUP>n</SUP>-1) */
|
|
|
#define DMD_CONV_K94 116 /* time in 2x current loop increment */
|
|
|
#define DMD_CONV_K95 118 /* current rate for k95 */
|
|
|
#define DMD_CONV_K96 120 /* phase rate for k96 */
|
|
|
#define DMD_CONV_PER_100 122 /* per cent unit, 100 correspond to 1.0 */
|
|
|
#define DMD_CONV_PER_1000 123 /* per thousand unit */
|
|
|
#define DMD_CONV_K239 124 /* motor Kt factor in mN(m)/A, 1000 correspond to 1.0mN(m)/A */
|
|
|
#define DMD_CONV_K1031 125 /* per cent unit, 3133 correspond to 1.0 or 100% */
|
|
|
#define DMD_CONV_TTI 126 /* Minimum time base TransnET (25us) */
|
|
|
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/**********************************************************************************************************/
|
|
|
/*- MACROS */
|
|
|
/**********************************************************************************************************/
|
|
|
|
|
|
#define DMD_MAJOR(v) (((v)>>24) & 0xFF) /* major version information */
|
|
|
#define DMD_MINOR(v) (((v)>>16) & 0xFF) /* minor version information */
|
|
|
#define DMD_MICRO(v) (((v)>>8) & 0xFF) /* micro version information */
|
|
|
|
|
|
#ifndef ETEL_NO_P_MACROS
|
|
|
#define _DMD_P1(p) p
|
|
|
#define DMD_P1(p) p
|
|
|
#define _DMD_P2(p) p,
|
|
|
#define DMD_P2(p) p,
|
|
|
#endif
|
|
|
|
|
|
/**********************************************************************************************************/
|
|
|
/*- TYPES */
|
|
|
/**********************************************************************************************************/
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* type modifiers
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
/*------------------------------*/
|
|
|
/* WINDOWS type modifiers */
|
|
|
#ifdef WIN32
|
|
|
#define _DMD_EXPORT __cdecl /* function exported by static library */
|
|
|
#define DMD_CALLBACK __cdecl /* client callback function called by library */
|
|
|
#endif /* WIN32 */
|
|
|
|
|
|
/*------------------------------*/
|
|
|
/* QNX4 type modifiers */
|
|
|
#ifdef QNX4
|
|
|
#define _DMD_EXPORT __cdecl /* function exported by library */
|
|
|
#define DMD_CALLBACK __cdecl /* client callback function called by library */
|
|
|
#endif /* QNX4 */
|
|
|
|
|
|
/*------------------------------*/
|
|
|
/* POSIX type modifiers */
|
|
|
#ifdef POSIX
|
|
|
#define _DMD_EXPORT /* function exported by library */
|
|
|
#define DMD_CALLBACK /* client callback function called by library */
|
|
|
#endif /* POSIX */
|
|
|
|
|
|
/*------------------------------*/
|
|
|
/* VXWORKS type modifiers */
|
|
|
#ifdef VXWORKS
|
|
|
#define _DMD_EXPORT /* function exported by library */
|
|
|
#define DMD_CALLBACK /* client callback function called by library */
|
|
|
#endif /* VXWORKS */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* hidden structures for library clients
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifndef DMD
|
|
|
#define DMD void
|
|
|
#endif
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* extended types
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
/*--------------------------*/
|
|
|
/* byte type */
|
|
|
#ifndef __BYTE
|
|
|
#define __BYTE
|
|
|
typedef unsigned char byte;
|
|
|
#endif
|
|
|
|
|
|
/*--------------------------*/
|
|
|
/* word type */
|
|
|
#ifndef __WORD
|
|
|
#define __WORD
|
|
|
typedef unsigned short word;
|
|
|
#endif
|
|
|
|
|
|
/*--------------------------*/
|
|
|
/* dword type */
|
|
|
#ifndef __DWORD
|
|
|
#define __DWORD
|
|
|
typedef unsigned int dword;
|
|
|
#endif
|
|
|
|
|
|
/*--------------------------*/
|
|
|
/* char_p type */
|
|
|
#ifndef __CHAR_P
|
|
|
#define __CHAR_P
|
|
|
typedef char *char_p;
|
|
|
#endif
|
|
|
|
|
|
/*--------------------------*/
|
|
|
/* char_cp type */
|
|
|
#ifndef __CHAR_CP
|
|
|
#define __CHAR_CP
|
|
|
typedef const char *char_cp;
|
|
|
#ifndef __cplusplus
|
|
|
#ifndef __BOOL
|
|
|
#define __BOOL
|
|
|
typedef byte bool;
|
|
|
#endif /*BOOL */
|
|
|
#endif /*__cplusplus */
|
|
|
#endif /*CHAR_CP */
|
|
|
|
|
|
/*--------------------------*/
|
|
|
/* 64 bits integer */
|
|
|
#ifndef __INT64
|
|
|
#define __INT64
|
|
|
#if __BYTE_ORDER == __LITTLE_ENDIAN
|
|
|
typedef struct INT64_DWORD_MODE {
|
|
|
dword low_dword;
|
|
|
dword high_dword;
|
|
|
} INT64_DWORD_MODE;
|
|
|
#else /*__BYTE_ORDER*/
|
|
|
typedef struct INT64_DWORD_MODE {
|
|
|
dword high_dword;
|
|
|
dword low_dword;
|
|
|
} INT64_DWORD_MODE;
|
|
|
#endif /*__BYTE_ORDER*/
|
|
|
|
|
|
#if __BYTE_ORDER == __LITTLE_ENDIAN
|
|
|
typedef struct INT64_BYTE_MODE {
|
|
|
byte byte0;
|
|
|
byte byte1;
|
|
|
byte byte2;
|
|
|
byte byte3;
|
|
|
byte byte4;
|
|
|
byte byte5;
|
|
|
byte byte6;
|
|
|
byte byte7;
|
|
|
} INT64_BYTE_MODE;
|
|
|
#else /*__BYTE_ORDER*/
|
|
|
typedef struct INT64_BYTE_MODE {
|
|
|
byte byte7;
|
|
|
byte byte6;
|
|
|
byte byte5;
|
|
|
byte byte4;
|
|
|
byte byte3;
|
|
|
byte byte2;
|
|
|
byte byte1;
|
|
|
byte byte0;
|
|
|
} INT64_BYTE_MODE;
|
|
|
#endif /*__BYTE_ORDER*/
|
|
|
|
|
|
/*------------------------------*/
|
|
|
/* WINDOWS 64 bits integer */
|
|
|
#if defined WIN32
|
|
|
#ifdef _MSC_VER
|
|
|
//Microsoft Compiler <= 6
|
|
|
#if _MSC_VER <= 1200
|
|
|
#define eint64 _int64
|
|
|
#else
|
|
|
#define eint64 long long
|
|
|
#endif
|
|
|
#else
|
|
|
#define eint64 long long
|
|
|
#endif
|
|
|
/*------------------------------*/
|
|
|
/* POSIX 64 bits integer */
|
|
|
#elif defined POSIX
|
|
|
#define eint64 long long
|
|
|
/*--------------------------------------*/
|
|
|
/* QNX4 and VXWORKS 64 bits integer */
|
|
|
/* On these systems,64 bits integer are not standard */
|
|
|
#elif (defined QNX4 || defined VXWORKS)
|
|
|
typedef union eint64 {
|
|
|
INT64_DWORD_MODE dwords;
|
|
|
INT64_BYTE_MODE bytes;
|
|
|
byte raw[8];
|
|
|
} eint64;
|
|
|
#endif
|
|
|
#endif
|
|
|
|
|
|
/**
|
|
|
* @enum DMD_FAMILY
|
|
|
* Device family enum
|
|
|
*/
|
|
|
typedef enum {
|
|
|
DMD_FAMILY_UNDEFINED = 0,
|
|
|
DMD_FAMILY_DSB = 1,
|
|
|
DMD_FAMILY_DSC = 2,
|
|
|
DMD_FAMILY_ACCURET = 3
|
|
|
} DMD_FAMILY;
|
|
|
|
|
|
/**
|
|
|
* @struct DMD_UNITS
|
|
|
* unit structure
|
|
|
*/
|
|
|
typedef struct DMD_UNITS {
|
|
|
size_t size; /**< the size of this structure */
|
|
|
#ifdef DMD_OO_API
|
|
|
int secondExp; /**< exposent of 's' unit */
|
|
|
int positionExp; /**< exposent of 'm' or 't'(turn) unit */
|
|
|
int voltExp; /**< exposent of 'V' unit */
|
|
|
int ampereExp; /**< exposent of 'A' unit */
|
|
|
int periodExp; /**< exposent of period (360 deg) unit */
|
|
|
int forceExp; /**< exposent of 'N' or 'Nm' unit */
|
|
|
int tempExp; /**< exposent of '0C' unit */
|
|
|
#else /* DMD_OO_API */
|
|
|
int second_exp; /**< exposent of 's' unit */
|
|
|
int position_exp; /**< exposent of 'm' or 't'(turn) unit */
|
|
|
int volt_exp; /**< exposent of 'V' unit */
|
|
|
int ampere_exp; /**< exposent of 'A' unit */
|
|
|
int period_exp; /**< exposent of period (360 deg) unit */
|
|
|
int force_exp; /**< exposent of 'N' or 'Nm' unit */
|
|
|
int temp_exp; /**< exposent of '0C' unit */
|
|
|
#endif /* DMD_OO_API */
|
|
|
} DMD_UNITS;
|
|
|
#define DmdUnits DMD_UNITS
|
|
|
typedef const DMD_UNITS *DMD_UNITS_CP; /**< pointer to units information */
|
|
|
|
|
|
/**********************************************************************************************************/
|
|
|
/*- PROTOTYPES */
|
|
|
/**********************************************************************************************************/
|
|
|
/**
|
|
|
* @addtogroup DMDAll
|
|
|
* @{
|
|
|
*/
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* general functions
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
dword _DMD_EXPORT dmd_get_version(void);
|
|
|
dword _DMD_EXPORT dmd_get_edi_version(void);
|
|
|
time_t _DMD_EXPORT dmd_get_build_time(void);
|
|
|
char_cp _DMD_EXPORT dmd_translate_error(int code);
|
|
|
char_cp _DMD_EXPORT dmd_translate_drv_product(int d_prod);
|
|
|
char_cp _DMD_EXPORT dmd_translate_ext_product(int x_prod);
|
|
|
bool _DMD_EXPORT dmd_is_double_conv(int conv);
|
|
|
int _DMD_EXPORT dmd_get_conv_idx(char_cp alias);
|
|
|
DMD_UNITS_CP _DMD_EXPORT dmd_get_conv_units(int conv);
|
|
|
char_cp _DMD_EXPORT dmd_get_default_type_text(int typ);
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* supported drive version
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
dword _DMD_EXPORT dmd_get_first_defined_drv_version(int prod);
|
|
|
dword _DMD_EXPORT dmd_get_last_defined_drv_version(int prod);
|
|
|
dword _DMD_EXPORT dmd_get_next_defined_drv_version(int prod, dword ver);
|
|
|
bool _DMD_EXPORT dmd_is_drv_version_supported(int prod, dword ver);
|
|
|
bool _DMD_EXPORT dmd_is_drv_version_compatible(int prod, dword ref, dword ver);
|
|
|
void _DMD_EXPORT dmd_version_to_string(char *buffer, int max, dword version);
|
|
|
int _DMD_EXPORT dmd_string_to_version(char *buffer, dword *version);
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* supported extension card version
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
dword _DMD_EXPORT dmd_get_first_defined_ext_version(int prod);
|
|
|
dword _DMD_EXPORT dmd_get_last_defined_ext_version(int prod);
|
|
|
dword _DMD_EXPORT dmd_get_next_defined_ext_version(int prod, dword ver);
|
|
|
bool _DMD_EXPORT dmd_is_ext_version_supported(int prod, dword ver);
|
|
|
bool _DMD_EXPORT dmd_is_ext_version_compatible(int prod, dword ref, dword ver);
|
|
|
DMD_FAMILY _DMD_EXPORT dmd_get_prod_family(int prod);
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* object creation functions
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
int _DMD_EXPORT dmd_create(DMD **dmd, int d_prod, dword d_ver, int x_prod, dword x_ver);
|
|
|
int _DMD_EXPORT dmd_destroy(DMD **dmd);
|
|
|
bool _DMD_EXPORT dmd_is_valid(DMD *dmd);
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* general information retrieving
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
int _DMD_EXPORT dmd_get_drv_product(DMD *dmd);
|
|
|
int _DMD_EXPORT dmd_get_ext_product(DMD *dmd);
|
|
|
dword _DMD_EXPORT dmd_get_drv_version(DMD *dmd);
|
|
|
dword _DMD_EXPORT dmd_get_ext_version(DMD *dmd);
|
|
|
DMD_FAMILY _DMD_EXPORT dmd_get_family(DMD *dmd);
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* register meta-data access
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
char_cp _DMD_EXPORT dmd_get_type_text(DMD *dmd, int text, int typ);
|
|
|
int _DMD_EXPORT dmd_get_register_type_idx(DMD *dmd, char_cp alias, int *typ, int *idx);
|
|
|
char_cp _DMD_EXPORT dmd_get_register_text(DMD *dmd, int text, int typ, unsigned idx, int sidx);
|
|
|
char_cp _DMD_EXPORT dmd_get_register_group(DMD *dmd, int text, int typ, unsigned idx);
|
|
|
long _DMD_EXPORT dmd_get_register_min_value(DMD *dmd, int typ, unsigned idx, int sidx);
|
|
|
long _DMD_EXPORT dmd_get_register_max_value(DMD *dmd, int typ, unsigned idx, int sidx);
|
|
|
long _DMD_EXPORT dmd_get_register_default_value(DMD *dmd, int typ, unsigned idx, int sidx);
|
|
|
long _DMD_EXPORT dmd_get_register_min_value_int32(DMD *dmd, int typ, unsigned idx, int sidx);
|
|
|
long _DMD_EXPORT dmd_get_register_max_value_int32(DMD *dmd, int typ, unsigned idx, int sidx);
|
|
|
long _DMD_EXPORT dmd_get_register_default_value_int32(DMD *dmd, int typ, unsigned idx, int sidx);
|
|
|
eint64 _DMD_EXPORT dmd_get_register_min_value_int64(DMD *dmd, int typ, unsigned idx, int sidx);
|
|
|
eint64 _DMD_EXPORT dmd_get_register_max_value_int64(DMD *dmd, int typ, unsigned idx, int sidx);
|
|
|
eint64 _DMD_EXPORT dmd_get_register_default_value_int64(DMD *dmd, int typ, unsigned idx, int sidx);
|
|
|
float _DMD_EXPORT dmd_get_register_min_value_float32(DMD *dmd, int typ, unsigned idx, int sidx);
|
|
|
float _DMD_EXPORT dmd_get_register_max_value_float32(DMD *dmd, int typ, unsigned idx, int sidx);
|
|
|
float _DMD_EXPORT dmd_get_register_default_value_float32(DMD *dmd, int typ, unsigned idx, int sidx);
|
|
|
double _DMD_EXPORT dmd_get_register_min_value_float64(DMD *dmd, int typ, unsigned idx, int sidx);
|
|
|
double _DMD_EXPORT dmd_get_register_max_value_float64(DMD *dmd, int typ, unsigned idx, int sidx);
|
|
|
double _DMD_EXPORT dmd_get_register_default_value_float64(DMD *dmd, int typ, unsigned idx, int sidx);
|
|
|
eint64 _DMD_EXPORT dmd_get_register_min_value_rawbits(DMD *dmd, int typ, unsigned idx, int sidx);
|
|
|
eint64 _DMD_EXPORT dmd_get_register_max_value_rawbits(DMD *dmd, int typ, unsigned idx, int sidx);
|
|
|
eint64 _DMD_EXPORT dmd_get_register_default_value_rawbits(DMD *dmd, int typ, unsigned idx, int sidx);
|
|
|
|
|
|
bool _DMD_EXPORT dmd_is_double_register(DMD *dmd, int typ, unsigned idx, int sidx);
|
|
|
bool _DMD_EXPORT dmd_is_system_register(DMD *dmd, int typ, unsigned idx, int sidx);
|
|
|
int _DMD_EXPORT dmd_get_register_convert(DMD *dmd, int typ, unsigned idx, int sidx);
|
|
|
DMD_UNITS_CP
|
|
|
_DMD_EXPORT dmd_get_register_units(DMD *dmd, int typ, unsigned idx, int sidx);
|
|
|
int _DMD_EXPORT dmd_get_register_enum_group(DMD *dmd, int typ, unsigned idx, int sidx);
|
|
|
int _DMD_EXPORT dmd_get_subindex_enum_group(DMD *dmd, int typ, unsigned idx);
|
|
|
bool _DMD_EXPORT dmd_is_type_available(DMD *dmd, int typ);
|
|
|
bool _DMD_EXPORT dmd_is_type_uniform(DMD *dmd, int typ);
|
|
|
bool _DMD_EXPORT dmd_is_type_writable(DMD *dmd, int typ);
|
|
|
bool _DMD_EXPORT dmd_is_type_restored(DMD *dmd, int typ);
|
|
|
bool _DMD_EXPORT dmd_is_type_int32(DMD *dmd, int typ);
|
|
|
bool _DMD_EXPORT dmd_is_type_int64(DMD *dmd, int typ);
|
|
|
bool _DMD_EXPORT dmd_is_type_float32(DMD *dmd, int typ);
|
|
|
bool _DMD_EXPORT dmd_is_type_float64(DMD *dmd, int typ);
|
|
|
bool _DMD_EXPORT dmd_is_index_available(DMD *dmd, int typ, unsigned idx);
|
|
|
bool _DMD_EXPORT dmd_is_register_available(DMD *dmd, int typ, unsigned idx, int sidx);
|
|
|
long _DMD_EXPORT dmd_get_number_of_indexes(DMD *dmd, int typ);
|
|
|
int _DMD_EXPORT dmd_get_number_of_subindexes(DMD *dmd, int typ, int index);
|
|
|
int _DMD_EXPORT dmd_get_max_number_of_subindexes(DMD *dmd, int typ);
|
|
|
bool _DMD_EXPORT dmd_is_register_writable(DMD *dmd, int typ, unsigned idx, int sidx);
|
|
|
bool _DMD_EXPORT dmd_is_register_restored(DMD *dmd, int typ, unsigned idx, int sidx);
|
|
|
bool _DMD_EXPORT dmd_is_register_deprecated(DMD *dmd, int typ, unsigned idx, int sidx);
|
|
|
bool _DMD_EXPORT dmd_is_register_hidden(DMD *dmd, int typ, unsigned idx, int sidx);
|
|
|
bool _DMD_EXPORT dmd_is_register_int32(DMD *dmd, int typ, unsigned idx, int sidx);
|
|
|
bool _DMD_EXPORT dmd_is_register_int64(DMD *dmd, int typ, unsigned idx, int sidx);
|
|
|
bool _DMD_EXPORT dmd_is_register_float32(DMD *dmd, int typ, unsigned idx, int sidx);
|
|
|
bool _DMD_EXPORT dmd_is_register_float64(DMD *dmd, int typ, unsigned idx, int sidx);
|
|
|
int _DMD_EXPORT dmd_get_register_increment_type(DMD *dmd, int typ, unsigned idx, int sidx);
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* command meta-data access
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
int _DMD_EXPORT dmd_get_command_idx(DMD *dmd, char_cp alias);
|
|
|
char_cp _DMD_EXPORT dmd_get_command_text(DMD *dmd, int text, int idx);
|
|
|
char_cp _DMD_EXPORT dmd_get_command_group(DMD *dmd, int text, int idx);
|
|
|
char_cp _DMD_EXPORT dmd_get_parameter_text(DMD *dmd, int text, int idx, int par);
|
|
|
long _DMD_EXPORT dmd_get_parameter_min_value(DMD *dmd, int idx, int par);
|
|
|
long _DMD_EXPORT dmd_get_parameter_max_value(DMD *dmd, int idx, int par);
|
|
|
long _DMD_EXPORT dmd_get_parameter_default_value(DMD *dmd, int idx, int par);
|
|
|
long _DMD_EXPORT dmd_get_parameter_min_value_int32(DMD *dmd, int idx, int par);
|
|
|
long _DMD_EXPORT dmd_get_parameter_max_value_int32(DMD *dmd, int idx, int par);
|
|
|
long _DMD_EXPORT dmd_get_parameter_default_value_int32(DMD *dmd, int idx, int par);
|
|
|
eint64 _DMD_EXPORT dmd_get_parameter_min_value_int64(DMD *dmd, int idx, int par);
|
|
|
eint64 _DMD_EXPORT dmd_get_parameter_max_value_int64(DMD *dmd, int idx, int par);
|
|
|
eint64 _DMD_EXPORT dmd_get_parameter_default_value_int64(DMD *dmd, int idx, int par);
|
|
|
float _DMD_EXPORT dmd_get_parameter_min_value_float32(DMD *dmd, int idx, int par);
|
|
|
float _DMD_EXPORT dmd_get_parameter_max_value_float32(DMD *dmd, int idx, int par);
|
|
|
float _DMD_EXPORT dmd_get_parameter_default_value_float32(DMD *dmd, int idx, int par);
|
|
|
double _DMD_EXPORT dmd_get_parameter_min_value_float64(DMD *dmd, int idx, int par);
|
|
|
double _DMD_EXPORT dmd_get_parameter_max_value_float64(DMD *dmd, int idx, int par);
|
|
|
double _DMD_EXPORT dmd_get_parameter_default_value_float64(DMD *dmd, int idx, int par);
|
|
|
eint64 _DMD_EXPORT dmd_get_parameter_min_value_rawbits(DMD *dmd, int idx, int par);
|
|
|
eint64 _DMD_EXPORT dmd_get_parameter_max_value_rawbits(DMD *dmd, int idx, int par);
|
|
|
eint64 _DMD_EXPORT dmd_get_parameter_default_value_rawbits(DMD *dmd, int idx, int par);
|
|
|
bool _DMD_EXPORT dmd_is_double_parameter(DMD *dmd, int idx, int par);
|
|
|
int _DMD_EXPORT dmd_get_parameter_convert(DMD *dmd, int idx, int par);
|
|
|
DMD_UNITS_CP
|
|
|
_DMD_EXPORT dmd_get_parameter_units(DMD *dmd, int idx, int par);
|
|
|
int _DMD_EXPORT dmd_get_parameter_enum_group(DMD *dmd, int idx, int par);
|
|
|
int _DMD_EXPORT dmd_get_number_of_parameters(DMD *dmd, int idx);
|
|
|
bool _DMD_EXPORT dmd_is_command_available(DMD *dmd, int idx);
|
|
|
bool _DMD_EXPORT dmd_is_command_rec_available(DMD *dmd, int idx, int rec, int dst_typ);
|
|
|
bool _DMD_EXPORT dmd_is_command_deprecated(DMD *dmd, int idx);
|
|
|
bool _DMD_EXPORT dmd_is_command_hidden(DMD *dmd, int idx);
|
|
|
bool _DMD_EXPORT dmd_is_command_waiting(DMD *dmd, int idx);
|
|
|
bool _DMD_EXPORT dmd_is_parameter_jump_target(DMD *dmd, int idx, int par);
|
|
|
bool _DMD_EXPORT dmd_is_parameter_l_value(DMD *dmd, int idx, int par);
|
|
|
bool _DMD_EXPORT dmd_is_parameter_int32(DMD *dmd, int idx, int par);
|
|
|
bool _DMD_EXPORT dmd_is_parameter_int64(DMD *dmd, int idx, int par);
|
|
|
bool _DMD_EXPORT dmd_is_parameter_float32(DMD *dmd, int idx, int par);
|
|
|
bool _DMD_EXPORT dmd_is_parameter_float64(DMD *dmd, int idx, int par);
|
|
|
int _DMD_EXPORT dmd_get_parameter_increment_type(DMD *dmd, int idx, int par);
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* enum_g values access
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
bool _DMD_EXPORT dmd_is_enum_group_available(DMD *dmd, int enum_g);
|
|
|
char_cp _DMD_EXPORT dmd_get_enum_group_text(DMD *dmd, int text, int enum_g);
|
|
|
int _DMD_EXPORT dmd_get_enum_group_size(DMD *dmd, int enum_g);
|
|
|
char_cp _DMD_EXPORT dmd_get_enum_text(DMD *dmd, int text, int enum_g, int id);
|
|
|
long _DMD_EXPORT dmd_get_enum_value(DMD *dmd, int enum_g, int id);
|
|
|
long _DMD_EXPORT dmd_get_enum_value_int32(DMD *dmd, int enum_g, int id);
|
|
|
eint64 _DMD_EXPORT dmd_get_enum_value_int64(DMD *dmd, int enum_g, int id);
|
|
|
float _DMD_EXPORT dmd_get_enum_value_float32(DMD *dmd, int enum_g, int id);
|
|
|
double _DMD_EXPORT dmd_get_enum_value_float64(DMD *dmd, int enum_g, int id);
|
|
|
int _DMD_EXPORT dmd_get_enum_range(DMD *dmd, int enum_g, int id);
|
|
|
bool _DMD_EXPORT dmd_is_enum_mask(DMD *dmd, int enum_g, int id);
|
|
|
bool _DMD_EXPORT dmd_is_enum_hidden(DMD *dmd, int enum_g, int id);
|
|
|
bool _DMD_EXPORT dmd_is_enum_deprecated(DMD *dmd, int enum_g, int id);
|
|
|
bool _DMD_EXPORT dmd_is_register_enum_available(DMD *dmd, int enum_id, int typ, unsigned idx, int sidx);
|
|
|
bool _DMD_EXPORT dmd_is_subindex_enum_available(DMD *dmd, int enum_id, int typ, unsigned idx);
|
|
|
bool _DMD_EXPORT dmd_is_parameter_enum_available(DMD *dmd, int enum_id, int idx, int par);
|
|
|
|
|
|
/** @}*/
|
|
|
|
|
|
#ifdef __cplusplus
|
|
|
} /* extern "C" */
|
|
|
#endif
|
|
|
|
|
|
|
|
|
/**********************************************************************************************************/
|
|
|
/*- C++ WRAPPER CLASSES */
|
|
|
/**********************************************************************************************************/
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* Dmd base class - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class Dmd {
|
|
|
/*
|
|
|
* some public constants
|
|
|
*/
|
|
|
/*
|
|
|
* release status
|
|
|
*/
|
|
|
public:
|
|
|
enum { MICRO_ALPHA = 0x00 }; /* base number for alpha releases */
|
|
|
enum { MICRO_BETA = 0x40 }; /* base number for beta releases */
|
|
|
enum { MICRO_FINAL = 0x80 }; /* base number for final releases */
|
|
|
|
|
|
/*
|
|
|
* special user register
|
|
|
*/
|
|
|
public:
|
|
|
enum { USR_ACC = 0xFFFF } ; /* special user data - accumulator */
|
|
|
enum { VAR_INDIRECT = 0xFFFE } ; /* indirect register access */
|
|
|
|
|
|
/*
|
|
|
* special product number
|
|
|
*/
|
|
|
public:
|
|
|
enum { PRODUCT_ANY = -1 } ; /* special product number - any */
|
|
|
enum { PRODUCT_ANY_DSC = -1 } ; /* special product number - any DSC*/
|
|
|
enum { PRODUCT_ANY_ACCURET = -2 } ; /* special product number - any ACCURET*/
|
|
|
|
|
|
/*
|
|
|
* some maximum values
|
|
|
*/
|
|
|
enum { TYPES = 128 }; /* no more than 128 types now */
|
|
|
enum { ENUMS = 256 }; /* no more than 256 enums now */
|
|
|
enum { COMMANDS = 1280 }; /* no more than 1280 commands now */
|
|
|
enum { CONVS = 256 }; /* no more than 256 conversions now */
|
|
|
|
|
|
/*
|
|
|
* versions access
|
|
|
*/
|
|
|
public:
|
|
|
static dword getVersion() {
|
|
|
return dmd_get_version();
|
|
|
}
|
|
|
static dword getEdiVersion() {
|
|
|
return dmd_get_edi_version();
|
|
|
}
|
|
|
static time_t getBuildTime() {
|
|
|
return dmd_get_build_time();
|
|
|
}
|
|
|
|
|
|
static bool isDoubleConv(int conv) {
|
|
|
return dmd_is_double_conv(conv);
|
|
|
}
|
|
|
static int getConvIdx(char_cp alias) {
|
|
|
return dmd_get_conv_idx(alias);
|
|
|
}
|
|
|
static const DmdUnits &getConvUnits(int conv) {
|
|
|
return *dmd_get_conv_units(conv);
|
|
|
}
|
|
|
|
|
|
/*
|
|
|
* supported drive version
|
|
|
*/
|
|
|
static dword getFirstDefinedDrvVersion(int prod) {
|
|
|
return dmd_get_first_defined_drv_version(prod);
|
|
|
}
|
|
|
static dword getLastDefinedDrvVersion(int prod) {
|
|
|
return dmd_get_last_defined_drv_version(prod);
|
|
|
}
|
|
|
static dword getNextDefinedDrvVersion(int prod, dword ver) {
|
|
|
return dmd_get_next_defined_drv_version(prod, ver);
|
|
|
}
|
|
|
static bool isDrvVersionSupported(int prod, dword ver) {
|
|
|
return dmd_is_drv_version_supported(prod, ver);
|
|
|
}
|
|
|
static bool isDrvVersionCompatible(int prod, dword ref, dword ver) {
|
|
|
return dmd_is_drv_version_compatible(prod, ref, ver);
|
|
|
}
|
|
|
|
|
|
/*
|
|
|
* supported extension card version
|
|
|
*/
|
|
|
static dword getFirstDefinedExtVersion(int prod) {
|
|
|
return dmd_get_first_defined_ext_version(prod);
|
|
|
}
|
|
|
static dword getLastDefinedExtVersion(int prod) {
|
|
|
return dmd_get_last_defined_ext_version(prod);
|
|
|
}
|
|
|
static dword getNextDefinedExtVersion(int prod, dword ver) {
|
|
|
return dmd_get_next_defined_ext_version(prod, ver);
|
|
|
}
|
|
|
static bool isExtVersionSupported(int prod, dword ver) {
|
|
|
return dmd_is_ext_version_supported(prod, ver);
|
|
|
}
|
|
|
static bool isExtVersionCompatible(int prod, dword ref, dword ver) {
|
|
|
return dmd_is_ext_version_compatible(prod, ref, ver);
|
|
|
}
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* Dmd exception - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdException {
|
|
|
friend class DmdData;
|
|
|
friend class DmdTraductor;
|
|
|
/*
|
|
|
* public error codes
|
|
|
*/
|
|
|
enum { EBADDRVPROD = -416 }; /* an unknown drive product has been specified */
|
|
|
enum { EBADDRVVER = -418 }; /* a drive with an incompatible version has been specified */
|
|
|
enum { EBADEXTPROD = -417 }; /* an unknown extention card product has been specified */
|
|
|
enum { EBADEXTVER = -419 }; /* an extention card with an incompatible version has been specified */
|
|
|
enum { EBADPARAM = -415 }; /* one of the parameter is not valid */
|
|
|
enum { EOBSOLETE = -402 }; /* function is obsolete */
|
|
|
enum { ESYSTEM = -414 }; /* some system resource return an error */
|
|
|
|
|
|
|
|
|
/*
|
|
|
* exception code
|
|
|
*/
|
|
|
private:
|
|
|
int code;
|
|
|
|
|
|
/*
|
|
|
* constructor
|
|
|
*/
|
|
|
protected:
|
|
|
DmdException(int e) { code = e; };
|
|
|
|
|
|
/*
|
|
|
* translate a drive product code to the text description
|
|
|
*/
|
|
|
public:
|
|
|
static const char *translate(int d_prod) {
|
|
|
return dmd_translate_error(d_prod);
|
|
|
}
|
|
|
|
|
|
/*
|
|
|
* get error description
|
|
|
*/
|
|
|
public:
|
|
|
int getCode() {
|
|
|
return code;
|
|
|
}
|
|
|
const char *getText() {
|
|
|
return translate(code);
|
|
|
}
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* Data class - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
#define ERRCHK(a) do { int _err = (a); if (_err) throw DmdException(_err); } while(0)
|
|
|
class DmdData {
|
|
|
/*
|
|
|
* internal dmd pointer
|
|
|
*/
|
|
|
protected:
|
|
|
DMD *dmd;
|
|
|
|
|
|
/*
|
|
|
* text query constants
|
|
|
*/
|
|
|
public:
|
|
|
enum { TEXT_MNEMONIC = 1 }; /* mnemonic */
|
|
|
enum { TEXT_SHORT = 2 }; /* short text description */
|
|
|
|
|
|
/*
|
|
|
* constructors / destructor
|
|
|
*/
|
|
|
public:
|
|
|
DmdData(int d_prod, dword d_ver, int x_prod, dword x_ver) {
|
|
|
dmd = NULL;
|
|
|
ERRCHK(dmd_create(&dmd, d_prod, d_ver, x_prod, x_ver));
|
|
|
}
|
|
|
DmdData(DmdData &data) {
|
|
|
dmd = data.dmd;
|
|
|
}
|
|
|
DmdData() {
|
|
|
dmd = NULL;
|
|
|
}
|
|
|
bool isValid() {
|
|
|
return dmd_is_valid(dmd);
|
|
|
}
|
|
|
|
|
|
/*
|
|
|
* destructor function
|
|
|
*/
|
|
|
void destroy() {
|
|
|
ERRCHK(dmd_destroy(&dmd));
|
|
|
}
|
|
|
|
|
|
/*
|
|
|
* general information retrieving
|
|
|
*/
|
|
|
int getDrvProduct() {
|
|
|
return dmd_get_drv_product(dmd);
|
|
|
}
|
|
|
int getExtProduct() {
|
|
|
return dmd_get_ext_product(dmd);
|
|
|
}
|
|
|
int getDrvVersion() {
|
|
|
return dmd_get_drv_version(dmd);
|
|
|
}
|
|
|
int getExtVersion() {
|
|
|
return dmd_get_ext_version(dmd);
|
|
|
}
|
|
|
|
|
|
/*
|
|
|
* register meta-data access
|
|
|
*/
|
|
|
char_cp getTypeText(int text, int typ) {
|
|
|
return dmd_get_type_text(dmd, text, typ);
|
|
|
}
|
|
|
int getRegisterTypeIdx(char_cp alias, int *typ, int *idx) {
|
|
|
return dmd_get_register_type_idx(dmd, alias, typ, idx);
|
|
|
}
|
|
|
char_cp getRegisterText(int text, int typ, unsigned idx, int sidx) {
|
|
|
return dmd_get_register_text(dmd, text, typ, idx, sidx);
|
|
|
}
|
|
|
char_cp getRegisterGroup(int text, int typ, unsigned idx) {
|
|
|
return dmd_get_register_group(dmd, text, typ, idx);
|
|
|
}
|
|
|
long getRegisterMinValue(int typ, unsigned idx, int sidx) {
|
|
|
return dmd_get_register_min_value(dmd, typ, idx, sidx);
|
|
|
}
|
|
|
long getRegisterMaxValue(int typ, unsigned idx, int sidx) {
|
|
|
return dmd_get_register_max_value(dmd, typ, idx, sidx);
|
|
|
}
|
|
|
long getRegisterDefaultValue(int typ, unsigned idx, int sidx) {
|
|
|
return dmd_get_register_default_value(dmd, typ, idx, sidx);
|
|
|
}
|
|
|
long getRegisterMinValueInt32(int typ, unsigned idx, int sidx) {
|
|
|
return dmd_get_register_min_value_int32(dmd, typ, idx, sidx);
|
|
|
}
|
|
|
long getRegisterMaxValueInt32(int typ, unsigned idx, int sidx) {
|
|
|
return dmd_get_register_max_value_int32(dmd, typ, idx, sidx);
|
|
|
}
|
|
|
long getRegisterDefaultValueInt32(int typ, unsigned idx, int sidx) {
|
|
|
return dmd_get_register_default_value_int32(dmd, typ, idx, sidx);
|
|
|
}
|
|
|
eint64 getRegisterMinValueInt64(int typ, unsigned idx, int sidx) {
|
|
|
return dmd_get_register_min_value_int64(dmd, typ, idx, sidx);
|
|
|
}
|
|
|
eint64 getRegisterMaxValueInt64(int typ, unsigned idx, int sidx) {
|
|
|
return dmd_get_register_max_value_int64(dmd, typ, idx, sidx);
|
|
|
}
|
|
|
eint64 getRegisterDefaultValueInt64(int typ, unsigned idx, int sidx) {
|
|
|
return dmd_get_register_default_value_int64(dmd, typ, idx, sidx);
|
|
|
}
|
|
|
float getRegisterMinValueFloat32(int typ, unsigned idx, int sidx) {
|
|
|
return dmd_get_register_min_value_float32(dmd, typ, idx, sidx);
|
|
|
}
|
|
|
float getRegisterMaxValueFloat32(int typ, unsigned idx, int sidx) {
|
|
|
return dmd_get_register_max_value_float32(dmd, typ, idx, sidx);
|
|
|
}
|
|
|
float getRegisterDefaultValueFloat32(int typ, unsigned idx, int sidx) {
|
|
|
return dmd_get_register_default_value_float32(dmd, typ, idx, sidx);
|
|
|
}
|
|
|
double getRegisterMinValueFloat64(int typ, unsigned idx, int sidx) {
|
|
|
return dmd_get_register_min_value_float64(dmd, typ, idx, sidx);
|
|
|
}
|
|
|
double getRegisterMaxValueFloat64(int typ, unsigned idx, int sidx) {
|
|
|
return dmd_get_register_max_value_float64(dmd, typ, idx, sidx);
|
|
|
}
|
|
|
double getRegisterDefaultValueFloat64(int typ, unsigned idx, int sidx) {
|
|
|
return dmd_get_register_default_value_float64(dmd, typ, idx, sidx);
|
|
|
}
|
|
|
eint64 getRegisterMinValueRawBits(int typ, unsigned idx, int sidx) {
|
|
|
return dmd_get_register_min_value_rawbits(dmd, typ, idx, sidx);
|
|
|
}
|
|
|
eint64 getRegisterMaxValueRawBits(int typ, unsigned idx, int sidx) {
|
|
|
return dmd_get_register_max_value_rawbits(dmd, typ, idx, sidx);
|
|
|
}
|
|
|
eint64 getRegisterDefaultValueRawBits(int typ, unsigned idx, int sidx) {
|
|
|
return dmd_get_register_default_value_rawbits(dmd, typ, idx, sidx);
|
|
|
}
|
|
|
int getRegisterConvert(int typ, unsigned idx, int sidx) {
|
|
|
return dmd_get_register_convert(dmd, typ, idx, sidx);
|
|
|
}
|
|
|
int getRegisterEnumGroup(int typ, unsigned idx, int sidx) {
|
|
|
return dmd_get_register_enum_group(dmd, typ, idx, sidx);
|
|
|
}
|
|
|
int getSubindexEnumGroup(int typ, unsigned idx) {
|
|
|
return dmd_get_subindex_enum_group(dmd, typ, idx);
|
|
|
}
|
|
|
bool isDoubleRegister(int typ, unsigned idx, int sidx) {
|
|
|
return dmd_is_double_register(dmd, typ, idx, sidx);
|
|
|
}
|
|
|
bool isSystemRegister(int typ, unsigned idx, int sidx) {
|
|
|
return dmd_is_system_register(dmd, typ, idx, sidx);
|
|
|
}
|
|
|
const DMD_UNITS &getRegisterUnits(int typ, unsigned idx, int sidx) {
|
|
|
return *dmd_get_register_units(dmd, typ, idx, sidx);
|
|
|
}
|
|
|
bool isTypeAvailable(int typ) {
|
|
|
return dmd_is_type_available(dmd, typ);
|
|
|
}
|
|
|
bool isTypeUniform(int typ) {
|
|
|
return dmd_is_type_uniform(dmd, typ);
|
|
|
}
|
|
|
bool isTypeWritable(int typ) {
|
|
|
return dmd_is_type_writable(dmd, typ);
|
|
|
}
|
|
|
bool isTypeRestored(int typ) {
|
|
|
return dmd_is_type_restored(dmd, typ);
|
|
|
}
|
|
|
bool isTypeInt32(int typ) {
|
|
|
return dmd_is_type_int32(dmd, typ);
|
|
|
}
|
|
|
bool isTypeInt64(int typ) {
|
|
|
return dmd_is_type_int64(dmd, typ);
|
|
|
}
|
|
|
bool isTypeFloat32(int typ) {
|
|
|
return dmd_is_type_float32(dmd, typ);
|
|
|
}
|
|
|
bool isTypeFloat64(int typ) {
|
|
|
return dmd_is_type_float64(dmd, typ);
|
|
|
}
|
|
|
bool isIndexAvailable(int typ, unsigned idx) {
|
|
|
return dmd_is_index_available(dmd, typ, idx);
|
|
|
}
|
|
|
bool isRegisterAvailable(int typ, unsigned idx, int sidx) {
|
|
|
return dmd_is_register_available(dmd, typ, idx, sidx);
|
|
|
}
|
|
|
bool isRegisterWritable(int typ, unsigned idx, int sidx) {
|
|
|
return dmd_is_register_writable(dmd, typ, idx, sidx);
|
|
|
}
|
|
|
bool isRegisterRestored(int typ, unsigned idx, int sidx) {
|
|
|
return dmd_is_register_restored(dmd, typ, idx, sidx);
|
|
|
}
|
|
|
bool isRegisterHidden(int typ, unsigned idx, int sidx) {
|
|
|
return dmd_is_register_hidden(dmd, typ, idx, sidx);
|
|
|
}
|
|
|
bool isRegisterInt32(int typ, unsigned idx, int sidx) {
|
|
|
return dmd_is_register_int32(dmd, typ, idx, sidx);
|
|
|
}
|
|
|
bool isRegisterInt64(int typ, unsigned idx, int sidx) {
|
|
|
return dmd_is_register_int64(dmd, typ, idx, sidx);
|
|
|
}
|
|
|
bool isRegisterFloat32(int typ, unsigned idx, int sidx) {
|
|
|
return dmd_is_register_float32(dmd, typ, idx, sidx);
|
|
|
}
|
|
|
bool isRegisterFloat64(int typ, unsigned idx, int sidx) {
|
|
|
return dmd_is_register_float64(dmd, typ, idx, sidx);
|
|
|
}
|
|
|
int getRegisterIncrementType(int typ, unsigned idx, int sidx) {
|
|
|
return dmd_get_register_increment_type(dmd, typ, idx, sidx);
|
|
|
}
|
|
|
bool isRegisterDeprecated(int typ, unsigned idx, int sidx) {
|
|
|
return dmd_is_register_deprecated(dmd, typ, idx, sidx);
|
|
|
}
|
|
|
long getNumberOfIndexes(int typ) {
|
|
|
return dmd_get_number_of_indexes(dmd, typ);
|
|
|
}
|
|
|
int getNumberOfSubindexes(int typ, int index) {
|
|
|
return dmd_get_number_of_subindexes(dmd, typ, index);
|
|
|
}
|
|
|
int getMaxNumberOfSubindexes(int typ) {
|
|
|
return dmd_get_max_number_of_subindexes(dmd, typ);
|
|
|
}
|
|
|
|
|
|
/*
|
|
|
* command meta-data access
|
|
|
*/
|
|
|
int getCommandIdx(int text, char_cp alias) {
|
|
|
return dmd_get_command_idx(dmd, alias);
|
|
|
}
|
|
|
char_cp getCommandText(int text, int idx) {
|
|
|
return dmd_get_command_text(dmd, text, idx);
|
|
|
}
|
|
|
char_cp getCommandGroup(int text, int idx) {
|
|
|
return dmd_get_command_group(dmd, text, idx);
|
|
|
}
|
|
|
char_cp getParameterText(int text, int idx, int par) {
|
|
|
return dmd_get_parameter_text(dmd, text, idx, par);
|
|
|
}
|
|
|
long getParameterMinValue(int idx, int par) {
|
|
|
return dmd_get_parameter_min_value(dmd, idx, par);
|
|
|
}
|
|
|
long getParameterMaxValue(int idx, int par) {
|
|
|
return dmd_get_parameter_max_value(dmd, idx, par);
|
|
|
}
|
|
|
long getParameterDefaultValue(int idx, int par) {
|
|
|
return dmd_get_parameter_default_value(dmd, idx, par);
|
|
|
}
|
|
|
long getParameterMinValueInt32(int idx, int par) {
|
|
|
return dmd_get_parameter_min_value_int32(dmd, idx, par);
|
|
|
}
|
|
|
long getParameterMaxValueInt32(int idx, int par) {
|
|
|
return dmd_get_parameter_max_value_int32(dmd, idx, par);
|
|
|
}
|
|
|
long getParameterDefaultValueInt32(int idx, int par) {
|
|
|
return dmd_get_parameter_default_value_int32(dmd, idx, par);
|
|
|
}
|
|
|
eint64 getParameterMinValueInt64(int idx, int par) {
|
|
|
return dmd_get_parameter_min_value_int64(dmd, idx, par);
|
|
|
}
|
|
|
eint64 getParameterMaxValueInt64(int idx, int par) {
|
|
|
return dmd_get_parameter_max_value_int64(dmd, idx, par);
|
|
|
}
|
|
|
eint64 getParameterDefaultValueInt64(int idx, int par) {
|
|
|
return dmd_get_parameter_default_value_int64(dmd, idx, par);
|
|
|
}
|
|
|
float getParameterMinValueFloat32(int idx, int par) {
|
|
|
return dmd_get_parameter_min_value_float32(dmd, idx, par);
|
|
|
}
|
|
|
float getParameterMaxValueFloat32(int idx, int par) {
|
|
|
return dmd_get_parameter_max_value_float32(dmd, idx, par);
|
|
|
}
|
|
|
float getParameterDefaultValueFloat32(int idx, int par) {
|
|
|
return dmd_get_parameter_default_value_float32(dmd, idx, par);
|
|
|
}
|
|
|
double getParameterMinValueFloat64(int idx, int par) {
|
|
|
return dmd_get_parameter_min_value_float64(dmd, idx, par);
|
|
|
}
|
|
|
double getParameterMaxValueFloat64(int idx, int par) {
|
|
|
return dmd_get_parameter_max_value_float64(dmd, idx, par);
|
|
|
}
|
|
|
double getParameterDefaultValueFloat64(int idx, int par) {
|
|
|
return dmd_get_parameter_default_value_float64(dmd, idx, par);
|
|
|
}
|
|
|
eint64 getParameterMinValueRawBits(int idx, int par) {
|
|
|
return dmd_get_parameter_min_value_rawbits(dmd, idx, par);
|
|
|
}
|
|
|
eint64 getParameterMaxValueRawBits(int idx, int par) {
|
|
|
return dmd_get_parameter_max_value_rawbits(dmd, idx, par);
|
|
|
}
|
|
|
eint64 getParameterDefaultValueRawBits(int idx, int par) {
|
|
|
return dmd_get_parameter_default_value_rawbits(dmd, idx, par);
|
|
|
}
|
|
|
int getParameterConvert(int idx, int par) {
|
|
|
return dmd_get_parameter_convert(dmd, idx, par);
|
|
|
}
|
|
|
bool isDoubleParameter(int idx, int par) {
|
|
|
return dmd_is_double_parameter(dmd, idx, par);
|
|
|
}
|
|
|
const DMD_UNITS &getParameterUnits(int idx, int par) {
|
|
|
return *dmd_get_parameter_units(dmd, idx, par);
|
|
|
}
|
|
|
int getParameterEnumGroup(int idx, int par) {
|
|
|
return dmd_get_parameter_enum_group(dmd, idx, par);
|
|
|
}
|
|
|
int getNumberOfParameters(int idx) {
|
|
|
return dmd_get_number_of_parameters(dmd, idx);
|
|
|
}
|
|
|
bool isCommandAvailable(int idx) {
|
|
|
return dmd_is_command_available(dmd, idx);
|
|
|
}
|
|
|
bool isCommandRecAvailable(int idx, int rec, int dst_typ) {
|
|
|
return dmd_is_command_rec_available(dmd, idx, rec, dst_typ);
|
|
|
}
|
|
|
bool isCommandDeprecated(int idx) {
|
|
|
return dmd_is_command_deprecated(dmd, idx);
|
|
|
}
|
|
|
bool isCommandHidden(int idx) {
|
|
|
return dmd_is_command_hidden(dmd, idx);
|
|
|
}
|
|
|
bool isParameterJumpTarget(int idx, int par) {
|
|
|
return dmd_is_parameter_jump_target(dmd, idx, par);
|
|
|
}
|
|
|
bool isParameterLValue(int idx, int par) {
|
|
|
return dmd_is_parameter_l_value(dmd, idx, par);
|
|
|
}
|
|
|
bool isParameterInt64(int idx, int par) {
|
|
|
return dmd_is_parameter_int64(dmd, idx, par);
|
|
|
}
|
|
|
bool isParameterFloat32(int idx, int par) {
|
|
|
return dmd_is_parameter_float32(dmd, idx, par);
|
|
|
}
|
|
|
bool isParameterInt32(int idx, int par) {
|
|
|
return dmd_is_parameter_int32(dmd, idx, par);
|
|
|
}
|
|
|
bool isParameterFloat64(int idx, int par) {
|
|
|
return dmd_is_parameter_float64(dmd, idx, par);
|
|
|
}
|
|
|
int getParameterIncrementType(int idx, int par) {
|
|
|
return dmd_get_parameter_increment_type(dmd, idx, par);
|
|
|
}
|
|
|
|
|
|
|
|
|
/*
|
|
|
* enum_g values access
|
|
|
*/
|
|
|
bool isEnumGroupAvailable(int enum_g) {
|
|
|
return dmd_is_enum_group_available(dmd, enum_g);
|
|
|
}
|
|
|
char_cp getEnumGroupText(int text, int enum_g) {
|
|
|
return dmd_get_enum_group_text(dmd, text, enum_g);
|
|
|
}
|
|
|
int getEnumGroupSize(int enum_g) {
|
|
|
return dmd_get_enum_group_size(dmd, enum_g);
|
|
|
}
|
|
|
char_cp getEnumText(int text, int enum_g, int id) {
|
|
|
return dmd_get_enum_text(dmd, text, enum_g, id);
|
|
|
}
|
|
|
long getEnumValue(int enum_g, int id) {
|
|
|
return dmd_get_enum_value(dmd, enum_g, id);
|
|
|
}
|
|
|
long getEnumValueInt32(int enum_g, int id) {
|
|
|
return dmd_get_enum_value_int32(dmd, enum_g, id);
|
|
|
}
|
|
|
eint64 getEnumValueInt64(int enum_g, int id) {
|
|
|
return dmd_get_enum_value_int64(dmd, enum_g, id);
|
|
|
}
|
|
|
float getEnumValueFloat32(int enum_g, int id) {
|
|
|
return dmd_get_enum_value_float32(dmd, enum_g, id);
|
|
|
}
|
|
|
double getEnumValueFloat64(int enum_g, int id) {
|
|
|
return dmd_get_enum_value_float64(dmd, enum_g, id);
|
|
|
}
|
|
|
int getEnumRange(int enum_g, int id) {
|
|
|
return dmd_get_enum_range(dmd, enum_g, id);
|
|
|
}
|
|
|
bool isEnumMask(int enum_g, int id) {
|
|
|
return dmd_is_enum_mask(dmd, enum_g, id);
|
|
|
}
|
|
|
bool isEnumHidden(int enum_g, int id) {
|
|
|
return dmd_is_enum_hidden(dmd, enum_g, id);
|
|
|
}
|
|
|
bool isEnumDeprecated(int enum_g, int id) {
|
|
|
return dmd_is_enum_deprecated(dmd, enum_g, id);
|
|
|
}
|
|
|
bool isRegisterEnumAvailable(int enum_id, int typ, int idx, int sidx) {
|
|
|
return dmd_is_register_enum_available(dmd, enum_id, typ, idx, sidx);
|
|
|
}
|
|
|
bool isSubindexEnumAvailable(int enum_id, int typ, int idx) {
|
|
|
return dmd_is_subindex_enum_available(dmd, enum_id, typ, idx);
|
|
|
}
|
|
|
bool isParameterEnumAvailable(int enum_id, int idx, int par) {
|
|
|
return dmd_is_parameter_enum_available(dmd, enum_id, idx, par);
|
|
|
}
|
|
|
};
|
|
|
#undef ERRCHK
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*The enum values are now freezed
|
|
|
-ETELSQL-
|
|
|
SELECT subquery FROM prepareEnumsCpp
|
|
|
ORDER BY code;
|
|
|
-/ETELSQL-
|
|
|
*/
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* ebl baud rates - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdBaudrate {
|
|
|
public:
|
|
|
enum { DEFAULT = 0 }; /* default baud rate */
|
|
|
enum { B_9600 = 9600 }; /* 9600 bauds */
|
|
|
enum { B_19200 = 19200 }; /* 19200 bauds */
|
|
|
enum { B_38400 = 38400 }; /* 38400 bauds */
|
|
|
enum { B_57600 = 57600 }; /* 57600 bauds */
|
|
|
enum { B_115200 = 115200 }; /* 115200 bauds */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* display modes - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdDisplay {
|
|
|
public:
|
|
|
enum { NORMAL = 1 }; /* normal informations */
|
|
|
enum { TEMPERATURE = 2 }; /* drive temperature */
|
|
|
enum { ENCODER = 4 }; /* analog encoder signals */
|
|
|
enum { SEQUENCE = 8 }; /* sequence line number */
|
|
|
enum { X_BOARD = 16 }; /* extension board */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* drive error codes - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdDrvError {
|
|
|
public:
|
|
|
enum { SAVE_OPERATION = 1 }; /* save operation error */
|
|
|
enum { OVER_CURRENT_1 = 2 }; /* over current 1 */
|
|
|
enum { OVER_CURRENT_2 = 3 }; /* over current 2 */
|
|
|
enum { I2T_OVER_CURRENT = 4 }; /* i2t over current */
|
|
|
enum { OVER_TEMPERATURE = 5 }; /* over temperature */
|
|
|
enum { OVER_VOLTAGE = 6 }; /* over voltage error */
|
|
|
enum { POWER_SUPPLY_INRUSH = 7 }; /* inrush power supply error */
|
|
|
enum { ENCODER_AMPLITUDE = 20 }; /* encoder amplitude error */
|
|
|
enum { ENCODER_POSITION_LOST = 21 }; /* encoder position lost */
|
|
|
enum { UC_SYNCHRO = 22 }; /* uc synchro error */
|
|
|
enum { TRACKING_ERROR = 23 }; /* tracking error */
|
|
|
enum { OVER_SPEED = 24 }; /* over speed error */
|
|
|
enum { POWER_ON = 26 }; /* power on error */
|
|
|
enum { MOTOR_OVER_TEMP = 29 }; /* motor over temperature */
|
|
|
enum { LIMIT_SWITCH = 30 }; /* limit switch reached */
|
|
|
enum { LVDT_ERROR = 31 }; /* LVDT error */
|
|
|
enum { LVDT_NOT_PRESENT = 32 }; /* LVDT not present */
|
|
|
enum { LVDT_ADC_ERROR = 33 }; /* LVDT ADC out */
|
|
|
enum { F3_FUSE = 34 }; /* F3 fuse dead */
|
|
|
enum { F7_FUSE = 35 }; /* F7 fuse dead */
|
|
|
enum { BAD_SEQ_LABEL = 36 }; /* sequence label number */
|
|
|
enum { BAD_SEQ_LINE = 37 }; /* sequence line number */
|
|
|
enum { BAD_REG_IDX = 38 }; /* register number */
|
|
|
enum { STACK_OVERFLOW = 39 }; /* stack overflow */
|
|
|
enum { ETB_FRAMING = 46 }; /* EB framing error */
|
|
|
enum { ETB_OVERRUN = 47 }; /* EB overrun */
|
|
|
enum { ETB_CHECKSUM = 48 }; /* EB checksum error */
|
|
|
enum { ETB_SAME_AXIS = 49 }; /* EB same axis error */
|
|
|
enum { ETB_UNKNOWN_MESSAGE = 50 }; /* EB unknown message */
|
|
|
enum { ETB_DAISY_CHAIN = 51 }; /* EB daisy chain error */
|
|
|
enum { ETB_NO_SLAVES = 52 }; /* EB no slaves */
|
|
|
enum { ETB_OTHER_AXIS = 53 }; /* EB other axis error */
|
|
|
enum { ETB_SELF_TEST = 54 }; /* EB self test error */
|
|
|
enum { ETB_CHARACTER_LOST = 55 }; /* EB character lost */
|
|
|
enum { ETB_TIMEOUT = 56 }; /* EB timeout */
|
|
|
enum { MULTIPLE_INDEX = 61 }; /* multiple index error */
|
|
|
enum { SINGLE_INDEX = 62 }; /* single index error */
|
|
|
enum { SYNCHRO_START = 63 }; /* synchro start error */
|
|
|
enum { ETB_NO_MASTER = 71 }; /* EB no master */
|
|
|
enum { EBL_FRAMING = 80 }; /* EBL framing error */
|
|
|
enum { EBL_OVERRUN = 81 }; /* EBL overrun */
|
|
|
enum { EBL_CHECKSUM = 82 }; /* EBL checksum error */
|
|
|
enum { EBL_UNKNOWN_MESSAGE = 83 }; /* EBL unknown message */
|
|
|
enum { EBL_INPUT_BUFFER = 84 }; /* EBL input buffer error */
|
|
|
enum { EBL_TIMEOUT_1 = 86 }; /* EBL timeout 1 */
|
|
|
enum { EBL_TIMEOUT_2 = 87 }; /* EBL timeout 2 */
|
|
|
enum { EBL_OTHER_AXIS = 88 }; /* EBL other axis error */
|
|
|
enum { MAC_OVERRUN = 89 }; /* MACRO overrun */
|
|
|
enum { MAC_VIOLATION = 90 }; /* MACRO violation */
|
|
|
enum { MAC_PARITY = 91 }; /* MACRO parity error */
|
|
|
enum { MAC_UNDERRUN = 92 }; /* MACRO underrun */
|
|
|
enum { MAC_SYNC_LOST = 93 }; /* MACRO synchro lost */
|
|
|
enum { MAC_AUX_2_CMD = 94 }; /* MACRO aux 2 cmd error */
|
|
|
enum { MAC_AUX_2 = 95 }; /* MACRO aux 2 error */
|
|
|
enum { MAC_AUX_3 = 96 }; /* MACRO aux 3 error */
|
|
|
enum { MAC_AUX_4 = 97 }; /* MACRO aux 4 error */
|
|
|
enum { HARD_OVER_CURRENT = 130 }; /* hardware overcurrent */
|
|
|
enum { WD_CURRENT_UC = 140 }; /* current uc watchdog error */
|
|
|
enum { WD_POSITION_FPGA = 141 }; /* position FPGA watchdog */
|
|
|
enum { WD_POSITION_UC = 142 }; /* position uc watchdog error */
|
|
|
enum { WD_CURRENT_AD = 143 }; /* current A/D watchdog */
|
|
|
enum { WD_QUARTZ = 144 }; /* quartz watchdog */
|
|
|
enum { INIT_MOTOR_1 = 150 }; /* motor initialisation error 1 */
|
|
|
enum { INIT_MOTOR_2 = 151 }; /* motor initialisation error 2 */
|
|
|
enum { BAD_SOFTWARE = 176 }; /* bad software */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* status of enable input - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdEnableInput {
|
|
|
public:
|
|
|
enum { REQUIRED = 0 }; /* required */
|
|
|
enum { NOT_USED = 125 }; /* not used */
|
|
|
enum { X135 = 135 }; /* enable use of K110, K111, K112 */
|
|
|
enum { AUTO = 170 }; /* automatic */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* kind of encoder - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdEncoder {
|
|
|
public:
|
|
|
enum { ANALOG = 0 }; /* analog encoder */
|
|
|
enum { TTL = 1 }; /* TTL encoder */
|
|
|
enum { HALL = 2 }; /* HALL encoder */
|
|
|
enum { LVDT = 3 }; /* LVDT encoder */
|
|
|
enum { ANALOG_AND_MACRO = 100 }; /* analog encoder with MACRO bus */
|
|
|
enum { TTL_AND_MACRO = 101 }; /* TTL encoder with MACRO bus */
|
|
|
enum { UNCHECKED_ANALOG_AND_MACRO = 102 }; /* unchecked analog encoder with MACRO bus */
|
|
|
enum { HALL_AND_MACRO = 103 }; /* HALL encoder with MACRO bus */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* mask of fuses not controlled - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdFuseControl {
|
|
|
public:
|
|
|
enum { F3_DISABLED = 1 }; /* F3 disabled */
|
|
|
enum { F7_DISABLED = 2 }; /* F7 disabled */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* usage of limit/home switch - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdSwitch {
|
|
|
public:
|
|
|
enum { LIMIT_ENABLED = 1 }; /* limit switch enabled */
|
|
|
enum { HOME_INVERTED = 2 }; /* home switch inverted */
|
|
|
enum { HOME_ENABLED = 128 }; /* home switch enabled */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* homing modes - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdHoming {
|
|
|
public:
|
|
|
enum { NEGATIVE_MVT = 1 }; /* negative movement */
|
|
|
enum { MECHANICAL = 0 }; /* mechanical end stop */
|
|
|
enum { HOME_SW = 2 }; /* home switch */
|
|
|
enum { LIMIT_SW = 4 }; /* limit switch */
|
|
|
enum { HOME_SW_L = 6 }; /* home switch w/limit */
|
|
|
enum { SINGLE_INDEX = 8 }; /* single index */
|
|
|
enum { SINGLE_INDEX_L = 10 }; /* single index w/limit */
|
|
|
enum { MULTI_INDEX = 12 }; /* multi-index */
|
|
|
enum { MULTI_INDEX_L = 14 }; /* multi-index w/limit */
|
|
|
enum { GATED_INDEX = 16 }; /* single index and DIN2 */
|
|
|
enum { GATED_INDEX_L = 18 }; /* single index and DIN2 w/limit */
|
|
|
enum { MULTI_INDEX_DS = 20 }; /* multi-index w/defined stroke */
|
|
|
enum { IMMEDIATE = 22 }; /* immediate */
|
|
|
enum { SINGLE_INDEX_DS = 24 }; /* single index w/defined stroke */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* init modes - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdInitMode {
|
|
|
public:
|
|
|
enum { NONE = 0 }; /* none */
|
|
|
enum { PULSE = 1 }; /* current pulses */
|
|
|
enum { CONTINOUS = 2 }; /* continous current */
|
|
|
enum { HALL_UNTIL_EDGE = 3 }; /* digital hall sensor until edge */
|
|
|
enum { HALL_UNTIL_INDEX = 4 }; /* digital hall sensor until index */
|
|
|
enum { HALL = 5 }; /* digital hall sensor */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* integrator mode - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdIntegrator {
|
|
|
public:
|
|
|
enum { ON = 0 }; /* always off */
|
|
|
enum { IN_POSITION = 1 }; /* on in position */
|
|
|
enum { OFF = 2 }; /* always on */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* motor phase correction - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdPhaseCorrection {
|
|
|
public:
|
|
|
enum { PHASES = 0 }; /* phase not inverted */
|
|
|
enum { FORCE = 3 }; /* phase inverted */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* lookup-table definitions - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdLookupTable {
|
|
|
public:
|
|
|
enum { USER_0 = 0 }; /* user defined 0 */
|
|
|
enum { USER_1 = 1 }; /* user defined 1 */
|
|
|
enum { USER_2 = 2 }; /* user defined 2 */
|
|
|
enum { USER_3 = 3 }; /* user defined 3 */
|
|
|
enum { S_CURVE = 25 }; /* s-curve */
|
|
|
enum { TRIANGULAR = 28 }; /* triangular */
|
|
|
enum { SINE_CURVE = 31 }; /* sine curve */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* drive mode - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdDrvMode {
|
|
|
public:
|
|
|
enum { FORCE_REFERENCE = 0 }; /* force reference */
|
|
|
enum { POSITION_PROFILE = 1 }; /* position profile */
|
|
|
enum { SPEED_REFERENCE = 3 }; /* speed reference */
|
|
|
enum { POSITION_REFERENCE = 4 }; /* position reference */
|
|
|
enum { PULSE_DIRECTION = 5 }; /* pulse direction */
|
|
|
enum { PULSE_DIRECTION_TTL = 6 }; /* pulse direction TTL */
|
|
|
enum { DSMAX_POSITION_REFERENCE = 7 }; /* DSMAX position reference */
|
|
|
enum { POSITION_REFERENCE_2 = 36 }; /* position reference */
|
|
|
enum { PULSE_DIRECTION_2 = 37 }; /* pulse direction */
|
|
|
enum { PULSE_DIRECTION_TTL_2 = 38 }; /* pulse direction TTL */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* motor phases - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdPwmMode {
|
|
|
public:
|
|
|
enum { PHASES_1 = 10 }; /* 1 phase motor */
|
|
|
enum { PHASE_1_LOW_SWITCHING = 11 }; /* 1 phase motor with low switching freq */
|
|
|
enum { PHASE_1_HIGH_CL_FREQ = 13 }; /* 1 phase motor with high cl freq. */
|
|
|
enum { PHASES_2 = 20 }; /* 2 phase motor */
|
|
|
enum { PHASE_2_LOW_SWITCHING = 21 }; /* 2 phase motor with low switching freq. */
|
|
|
enum { PHASE_2_HIGH_CL_FREQ = 23 }; /* 2 phase motor with high cl freq. */
|
|
|
enum { PHASES_3 = 30 }; /* 3 phase motor */
|
|
|
enum { PHASE_3_LOW_SWITCHING = 31 }; /* 3 phase motor with low switching freq. */
|
|
|
enum { PHASE_3_HIGH_CL_FREQ = 33 }; /* 3 phase motor with high cl freq. */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* types of movement - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdMovement {
|
|
|
public:
|
|
|
enum { TRAPEZIODAL = 0 }; /* trapezoidal movement */
|
|
|
enum { S_CURVE = 1 }; /* S-curve movement */
|
|
|
enum { INFINITE_ROTARY_SLOW = 8 }; /* infinite rotary movement */
|
|
|
enum { SLOW_LKT = 10 }; /* LKT movement in slow interrupt */
|
|
|
enum { FAST_LKT = 11 }; /* LKT movement in fast interrupt */
|
|
|
enum { INFINITE_ROTARY_FAST = 12 }; /* infinite rotary movement (deprecated) */
|
|
|
enum { TTL_DRIVEN_LKT = 13 }; /* LKT movement drived by TTL encoder */
|
|
|
enum { SCURVE_ROTARY = 17 }; /* S-curve rotary movement */
|
|
|
enum { INFINITE_ROTARY = 24 }; /* infinite rotary movement */
|
|
|
enum { LKT_ROTARY = 26 }; /* LKT rotary movement */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* drive products - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdDrvProduct {
|
|
|
public:
|
|
|
enum { DSA2P = 2 }; /* DSA2P drive */
|
|
|
enum { DSB2P = 4 }; /* DSB2P drive */
|
|
|
enum { DSC2P = 6 }; /* DSC2P drive */
|
|
|
enum { DSCDP = 7 }; /* DSCDP drive */
|
|
|
enum { DSCDL = 8 }; /* DSCDL drive */
|
|
|
enum { DSCDL_QT = 9 }; /* DSCDL Servo Track Writer*/
|
|
|
enum { DSCDM = 10 }; /* DSCDM drive */
|
|
|
enum { DSCDU = 11 }; /* DSCDU drive */
|
|
|
enum { DSCDV = 12 }; /* DSCDV drive */
|
|
|
enum { ACCURET_12 = 12 }; /* aCCURet_12 drive */
|
|
|
enum { DSCQT = 13 }; /* DSCQT drive */
|
|
|
enum { DSPAC2 = 14 }; /* DSPAC2 General purpose module */
|
|
|
enum { GP_MODULE = 15 }; /* GP_MODULE General purpose module */
|
|
|
enum { DSMAX = 16 }; /* DSMAX axis controller */
|
|
|
enum { DSMAX2 = 17 }; /* DSMAX2 axis controller */
|
|
|
enum { DSMAX3 = 18 }; /* DSMAX3 axis controller */
|
|
|
enum { DSGAT_ST = 19 }; /* DSGAT-ST axis controller */
|
|
|
enum { ACCURET = 32 }; /* AccurET drive */
|
|
|
enum { ACCURET_48V = 33 }; /* AccurET 48V drive */
|
|
|
enum { ACCURET_300V = 34 }; /* AccurET 300V drive */
|
|
|
enum { ACCURET_DFC = 35 }; /* AccurET DFC drive */
|
|
|
enum { ACCURET_VHP = 36 }; /* AccurET VHP drive */
|
|
|
enum { ULTIMET = 48 }; /* UltimET multi-axis controller */
|
|
|
enum { ULTIMET_TCPIP = 49 }; /* UltimET multi-axis controller */
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* extension card products - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdExtProduct {
|
|
|
public:
|
|
|
enum { DSOSIO = 1 }; /* DSOSIO super i/o */
|
|
|
enum { DSO001 = 2 }; /* DSO001 power i/o */
|
|
|
enum { DSOLVD = 3 }; /* DSOLVD LVDT adapter */
|
|
|
enum { DSOMAC = 4 }; /* DSOMAC MACRO bus */
|
|
|
enum { DSOTEB = 5 }; /* DSOTEB (Turbo ETEL-BUS) */
|
|
|
enum { DSO003 = 6 }; /* DSO003 */
|
|
|
enum { DSOHIO = 7 }; /* DSOHIO hyper i/o */
|
|
|
enum { DSOCAN_CNE = 16 }; /* DSOCAN w/CANetel protocol */
|
|
|
enum { DSOCAN_CNW = 17 }; /* DSOCAN w/Wuilfer protocol */
|
|
|
enum { DSOSER = 24 }; /* DSOSER SERCOS bus */
|
|
|
enum { DSOPRO = 32 }; /* DSOCAN w/Wuilfer protocol */
|
|
|
enum { DSOSER2 = 25 }; /* DSOSER2 SERCOS bus */
|
|
|
enum { ACCURET_OPTIONAL_IO_BOARD = 64 }; /* AccurET Optional IO board*/
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* regeneration modes - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdRegeneration {
|
|
|
public:
|
|
|
enum { OFF = 0 }; /* always off */
|
|
|
enum { LIMITED = 2 }; /* on for max 10s */
|
|
|
enum { ON = 3 }; /* always on */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* source type - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdTyp {
|
|
|
public:
|
|
|
enum { BASIS_MASK = 0x1F}; /* mask applied on a byte representing a type to obtain the type basis */
|
|
|
enum { FLOAT_BIT_MASK = 0x20}; /* mask applied on a byte representing a type to obtain the float bit */
|
|
|
enum { L64_BIT_MASK = 0x40}; /* mask applied on a byte representing a type to obtain the 64 bit */
|
|
|
enum { NONE = 0 }; /* no type */
|
|
|
enum { IMMEDIATE = 0 }; /* disabled or immediate value */
|
|
|
enum { USER = 1 }; /* user registers */
|
|
|
enum { PPK = 2 }; /* drive parameters */
|
|
|
enum { MONITOR = 3 }; /* monitoring registers */
|
|
|
enum { IMMEDIATE_HDWORD = 4 }; /* immediate 64 bits value HIGH double-word*/
|
|
|
enum { SEQUENCE = 5 }; /* sequence buffer */
|
|
|
enum { TRACE = 6 }; /* trace buffer */
|
|
|
enum { ADDRESS = 7 }; /* address value */
|
|
|
enum { LKT = 8 }; /* movement lookup tables */
|
|
|
enum { TRIGGER = 9 }; /* triggers buffer */
|
|
|
enum { REALTIME = 10}; /* realtime buffer */
|
|
|
enum { HALL_LKT = 11}; /* hall lookup tables (deprecated)*/
|
|
|
enum { Y = 11}; /* Y type variables */
|
|
|
enum { FLOAT = 12}; /* float register */
|
|
|
enum { COMMON = 13}; /* common register */
|
|
|
enum { MAPPING = 14}; /* P mapping register */
|
|
|
|
|
|
enum { IMMEDIATE_INT32 = IMMEDIATE }; /* immediate integer 32 bits */
|
|
|
enum { IMMEDIATE_INT64 = IMMEDIATE | L64_BIT_MASK }; /* immediate integer 64 bits */
|
|
|
enum { IMMEDIATE_FLOAT32 = IMMEDIATE | FLOAT_BIT_MASK }; /* immediate float 32 bits */
|
|
|
enum { IMMEDIATE_FLOAT64 = IMMEDIATE | FLOAT_BIT_MASK | L64_BIT_MASK }; /* immediate float 64 bits */
|
|
|
enum { IMMEDIATE_INT64_LDWORD = IMMEDIATE_INT64 }; /* immediate integer 64 bits low double word*/
|
|
|
enum { IMMEDIATE_INT64_HDWORD = IMMEDIATE_INT64 | IMMEDIATE_HDWORD }; /* immediate integer 64 bits high double word*/
|
|
|
enum { IMMEDIATE_FLOAT64_LDWORD = IMMEDIATE_FLOAT64 }; /* immediate integer 64 bits low double word*/
|
|
|
enum { IMMEDIATE_FLOAT64_HDWORD = IMMEDIATE_FLOAT64 | IMMEDIATE_HDWORD }; /* immediate integer 64 bits high double word*/
|
|
|
|
|
|
enum { USER_INT32 = USER }; /* user register integer 32 bits */
|
|
|
enum { USER_INT64 = USER | L64_BIT_MASK }; /* user register integer 64 bits */
|
|
|
enum { USER_FLOAT32 = USER | FLOAT_BIT_MASK }; /* user register float 32 bits */
|
|
|
enum { USER_FLOAT64 = USER | FLOAT_BIT_MASK | L64_BIT_MASK }; /* user register float 64 bits */
|
|
|
|
|
|
enum { PPK_INT32 = PPK }; /* drive parameters integer 32 bits */
|
|
|
enum { PPK_INT64 = PPK | L64_BIT_MASK }; /* drive parameters integer 64 bits */
|
|
|
enum { PPK_FLOAT32 = PPK | FLOAT_BIT_MASK }; /* drive parameters float 32 bits */
|
|
|
enum { PPK_FLOAT64 = PPK | FLOAT_BIT_MASK | L64_BIT_MASK }; /* drive parameters float 64 bits */
|
|
|
|
|
|
enum { MONITOR_INT32 = MONITOR }; /* monitoring registers integer 32 bits */
|
|
|
enum { MONITOR_INT64 = MONITOR | L64_BIT_MASK }; /* monitoring registers integer 64 bits */
|
|
|
enum { MONITOR_FLOAT32 = MONITOR | FLOAT_BIT_MASK }; /* monitoring registers float 32 bits */
|
|
|
enum { MONITOR_FLOAT64 = MONITOR | FLOAT_BIT_MASK | L64_BIT_MASK }; /* monitoring registers float 64 bits */
|
|
|
|
|
|
enum { TRACE_INT32 = TRACE }; /* trace buffer integer 32 bits */
|
|
|
enum { TRACE_INT64 = TRACE | L64_BIT_MASK }; /* trace buffer integer 64 bits */
|
|
|
enum { TRACE_FLOAT32 = TRACE | FLOAT_BIT_MASK }; /* trace buffer float 32 bits */
|
|
|
enum { TRACE_FLOAT64 = TRACE | FLOAT_BIT_MASK | L64_BIT_MASK }; /* trace buffer float 64 bits */
|
|
|
|
|
|
enum { LKT_FLOAT64 = LKT | FLOAT_BIT_MASK | L64_BIT_MASK}; /* lookup table float 64 bits */
|
|
|
|
|
|
enum { TRIGGER_INT64 = TRIGGER | L64_BIT_MASK}; /* trigger buffer integer 64 bits */
|
|
|
|
|
|
enum { Y_INT32 = Y }; /* Y type variables integer 32 bits */
|
|
|
enum { Y_INT64 = Y | L64_BIT_MASK }; /* Y type variables integer 64 bits */
|
|
|
enum { Y_FLOAT32 = Y | FLOAT_BIT_MASK }; /* Y type variables float 32 bits */
|
|
|
enum { Y_FLOAT64 = Y | FLOAT_BIT_MASK | L64_BIT_MASK }; /* Y type variables float 64 bits */
|
|
|
|
|
|
enum { COMMON_INT32 = COMMON }; /* Common type variables integer 32 bits */
|
|
|
enum { COMMON_INT64 = COMMON | L64_BIT_MASK }; /* Common type variables integer 64 bits */
|
|
|
enum { COMMON_FLOAT32 = COMMON | FLOAT_BIT_MASK }; /* Common type variables float 32 bits */
|
|
|
enum { COMMON_FLOAT64 = COMMON | FLOAT_BIT_MASK | L64_BIT_MASK }; /* Common type variables float 64 bits */
|
|
|
|
|
|
enum { MAPPING_INT32 = MAPPING }; /* P Mapping integer 32 bits */
|
|
|
|
|
|
enum { INCREMENT_INT32 = 0 }; /* increment typ integer 32 bits */
|
|
|
enum { INCREMENT_INT64 = L64_BIT_MASK }; /* increment typ integer 64 bits */
|
|
|
enum { INCREMENT_FLOAT32 = FLOAT_BIT_MASK }; /* increment typ float 32 bits */
|
|
|
enum { INCREMENT_FLOAT64 = L64_BIT_MASK | FLOAT_BIT_MASK }; /* increment typ float 64 bits bits */
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* status drive 1 - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdStatus1 {
|
|
|
public:
|
|
|
enum { ERROR_OTHER_AXIS = LONG_MIN }; /* other axis error */
|
|
|
enum { ERROR_BYTE = -16777216 }; /* error byte */
|
|
|
enum { POWER_ON = 1 }; /* power on */
|
|
|
enum { INIT_DONE = 2 }; /* initialization done */
|
|
|
enum { HOMING_DONE = 4 }; /* indexation done */
|
|
|
enum { PRESENT = 8 }; /* present */
|
|
|
enum { MOVING = 16 }; /* moving */
|
|
|
enum { IN_WINDOW = 32 }; /* in window */
|
|
|
enum { MASTER = 64 }; /* EB master mode */
|
|
|
enum { WAITING = 128 }; /* driver is waiting */
|
|
|
enum { EXEC_SEQ = 256 }; /* sequence execution */
|
|
|
enum { EDIT_SEQ = 512 }; /* sequence edition */
|
|
|
enum { ERROR_ANY = 1024 }; /* global error */
|
|
|
enum { TRACE_BUSY = 2048 }; /* trace busy */
|
|
|
enum { BRIDGE = 4096 }; /* EB bridge mode */
|
|
|
enum { HOMING = 8192 }; /* homing */
|
|
|
enum { EBL_TO_EB = 16384 }; /* EBL to EB pass trough */
|
|
|
enum { SPY = 32768 }; /* EB spy mode */
|
|
|
enum { WARNING_I2T = 65536 }; /* i2t warning */
|
|
|
enum { WARNING_TEMP = 131072 }; /* over temperature warning */
|
|
|
enum { WARNING_ENCODER = 1048576 }; /* encoder warning */
|
|
|
enum { WARNING_TRACKING = 2097152 }; /* tracking warning */
|
|
|
enum { WARNING_BYTE = 16711680 }; /* warning byte */
|
|
|
enum { ERROR_CURRENT = 16777216 }; /* current error */
|
|
|
enum { ERROR_CONTROLLER = 33554432 }; /* controller error */
|
|
|
enum { ERROR_ETB_COMM = 67108864 }; /* EB communication error */
|
|
|
enum { ERROR_TRAJECTORY = 134217728 }; /* trajectory error */
|
|
|
enum { ERROR_EBL_COMM = 268435456 }; /* EBL communication error */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* status drive 2 - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdStatus2 {
|
|
|
public:
|
|
|
enum { SEQ_ERROR = 1 }; /* sequence error label pending */
|
|
|
enum { SEQ_WARNING = 2 }; /* sequence warning label pending */
|
|
|
enum { BP_WAITING = 16 }; /* break point waiting */
|
|
|
enum { USER_0 = 256 }; /* user bit 0 */
|
|
|
enum { USER_1 = 512 }; /* user bit 1 */
|
|
|
enum { USER_2 = 1024 }; /* user bit 2 */
|
|
|
enum { USER_3 = 2048 }; /* user bit 3 */
|
|
|
enum { USER_4 = 4096 }; /* user bit 4 */
|
|
|
enum { USER_5 = 8192 }; /* user bit 5 */
|
|
|
enum { USER_6 = 16384 }; /* user bit 6 */
|
|
|
enum { USER_7 = 32768 }; /* user bit 7 */
|
|
|
enum { USER_BYTE = 65280 }; /* user mask */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* current loop adc resolution - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdCurrentAdc {
|
|
|
public:
|
|
|
enum { BITS_12 = 0 }; /* 12 bits */
|
|
|
enum { BITS_14 = 1 }; /* 14 bits */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* current LKT mode - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdLktMode {
|
|
|
public:
|
|
|
enum { FINE_ADJUST = 1 }; /* fine phase adjustment */
|
|
|
enum { ROLLOVER = 2 }; /* rollover counter */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* monitoring register number - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdMonitorDest {
|
|
|
public:
|
|
|
enum { X_AOUT_1 = 173 }; /* extended analog output 1 */
|
|
|
enum { X_AOUT_2 = 174 }; /* extended analog output 2 */
|
|
|
enum { AOUT_1 = 175 }; /* analog output 1 */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* flash operations - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdFlash {
|
|
|
public:
|
|
|
enum { ALL = 0 }; /* all */
|
|
|
enum { SEQ_LKT = 1 }; /* sequence and user LKT */
|
|
|
enum { OTHER_PARAMS = 2 }; /* other parameters */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* master modes - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdMaster {
|
|
|
public:
|
|
|
enum { EXIT = 0 }; /* exit master mode */
|
|
|
enum { MASTER = 1 }; /* enter master mode */
|
|
|
enum { BRIDGE = 2 }; /* enter bridge mode */
|
|
|
enum { MASTER_AR = 3 }; /* enter master mode w/auto-recovery */
|
|
|
enum { BRIDGE_AR = 4 }; /* enter bridge mode w/auto-recovery */
|
|
|
enum { SPY = 255 }; /* enter spy mode */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* automatic operations - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdAuto {
|
|
|
public:
|
|
|
enum { CURRENT_LOOP = 1 }; /* tune current loop */
|
|
|
enum { PHASE_CORRECTION = 2 }; /* set motor phase correction */
|
|
|
enum { PHASE_ADJUSTMENT = 8 }; /* tune fine phase adjustment */
|
|
|
enum { POSITION_LOOP = 16 }; /* tune regulator parameters */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* breakpoint commands - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdBreakpoint {
|
|
|
public:
|
|
|
enum { SET = 1 }; /* set breakpoint */
|
|
|
enum { CLEAR = 2 }; /* clear breakpoint */
|
|
|
enum { SET_ALL = 3 }; /* set all breakpoints */
|
|
|
enum { CLEAR_ALL = 4 }; /* clear all breakpoints */
|
|
|
enum { GLOBAL = 5 }; /* set global breakpoint */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* continue commands - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdContinue {
|
|
|
public:
|
|
|
enum { CLEAR = 0 }; /* clear breakpoint counter */
|
|
|
enum { STEP = 1 }; /* step after breakpoint */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* download options - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdDownload {
|
|
|
public:
|
|
|
enum { PASS_THROUGH = 170 }; /* enter EBL/EB pass trough mode */
|
|
|
enum { DIRECT = 255 }; /* enter download mode */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* reboot option - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdShutdown {
|
|
|
public:
|
|
|
enum { MAGIC = 255 }; /* magic number */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* setpoint buffer mask - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdSetpoint {
|
|
|
public:
|
|
|
enum { TARGET_POSITION = 1 }; /* target position */
|
|
|
enum { PROFILE_VELOCITY = 2 }; /* profile velocity */
|
|
|
enum { PROFILE_ACCELERATION = 4 }; /* profile acceleration */
|
|
|
enum { JERK_FILTER_TIME = 8 }; /* jerk filter time */
|
|
|
enum { PROFILE_DECELERATION = 16 }; /* profile deceleration */
|
|
|
enum { END_VELOCITY = 32 }; /* end velocity */
|
|
|
enum { PROFILE_TYPE = 64 }; /* profile type */
|
|
|
enum { MVT_LKT_NUMBER = 128 }; /* lookup table number */
|
|
|
enum { MVT_LKT_TIME = 256 }; /* lookup table time */
|
|
|
enum { MVT_LKT_AMPLITUDE = 512 }; /* movement lookup table amplitude */
|
|
|
enum { MVT_DIRECTION = 1024 }; /* movement direction */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* trace trigger mode - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdTraceTrigger {
|
|
|
public:
|
|
|
enum { NONE = 0 }; /* no trigger */
|
|
|
enum { MVT_START = 1 }; /* start of movement */
|
|
|
enum { MVT_END = 2 }; /* end of movement */
|
|
|
enum { POSITION = 3 }; /* specified position */
|
|
|
enum { VALUE_1 = 4 }; /* value on first channel */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* fast interrupt time - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdFastInterrupt {
|
|
|
public:
|
|
|
enum { SYNCHRO = 4 }; /* PWM synchronization */
|
|
|
enum { U_166 = 0 }; /* 166 us */
|
|
|
enum { U_125 = 1 }; /* 125 us */
|
|
|
enum { U_83 = 2 }; /* 83 us */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* rotary movement direction - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdMovementDir {
|
|
|
public:
|
|
|
enum { POSITIVE = 0 }; /* positive movement */
|
|
|
enum { NEGATIVE = 1 }; /* negative movement */
|
|
|
enum { SHORTEST = 2 }; /* shortest movement */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* concatenated mode - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdConcatMode {
|
|
|
public:
|
|
|
enum { DISABLED = 0 }; /* concatened movement disabled */
|
|
|
enum { ENABLED = 1 }; /* concatened movement enabled */
|
|
|
enum { LKT_ONLY = 2 }; /* concatened movement enabled for LKT */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* LKT selection mode - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class Dmdx45 {
|
|
|
public:
|
|
|
enum { X0 = 0 }; /* the start and target position of the LKT is not the same */
|
|
|
enum { X1 = 1 }; /* the start and target position of the LKT is the same */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* fuse status - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdFuseStatus {
|
|
|
public:
|
|
|
enum { F3_FUSE = 1 }; /* fuse F3 dead */
|
|
|
enum { F7_FUSE = 2 }; /* fuse F7 dead */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* SLS selection mode - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdSlsMode {
|
|
|
public:
|
|
|
enum { NEGATIVE_MVT = 1 }; /* begin by negative movement */
|
|
|
enum { MECHANICAL = 0 }; /* mechanical end stop */
|
|
|
enum { LIMIT_SW = 2 }; /* limit switch */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* profile buffer - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdProfileBuffer {
|
|
|
public:
|
|
|
enum { IMMEDIATE = 0 }; /* immediate */
|
|
|
enum { BUFFER_1 = 1 }; /* buffer 1 */
|
|
|
enum { BUFFER_2 = 2 }; /* buffer 2 */
|
|
|
enum { BUFFER_3 = 3 }; /* buffer 3 */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* monitor channel - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdMonitor {
|
|
|
public:
|
|
|
enum { CHANNEL_0 = 0 }; /* channel 0 */
|
|
|
enum { CHANNEL_1 = 1 }; /* channel 1 */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* sequence buffer subindex - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdSequence {
|
|
|
public:
|
|
|
enum { HEADER = 0 }; /* header */
|
|
|
enum { PARAMETER_1 = 1 }; /* parameter 1 */
|
|
|
enum { PARAMETER_2 = 2 }; /* parameter 2 */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* realtime table - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdRealtime {
|
|
|
public:
|
|
|
enum { HEADER = 0 }; /* header */
|
|
|
enum { PARAMETER_1 = 1 }; /* parameter 1 */
|
|
|
enum { PARAMETER_2 = 2 }; /* parameter 2 */
|
|
|
enum { PARAMETER_3 = 3 }; /* parameter 3 */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* realtime header - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdRealtimeHeader {
|
|
|
public:
|
|
|
enum { STATUS_MASK = -16777216 }; /* status mask */
|
|
|
enum { TYPE_MASK = 255 }; /* type mask */
|
|
|
enum { LABEL_MASK = 65280 }; /* label mask */
|
|
|
enum { CLEAR_WAIT_MODE = 65536 }; /* clear wait mode */
|
|
|
enum { MODE_MASK = 16711680 }; /* mode mask */
|
|
|
enum { VALID_STATUS = 16777216 }; /* valid status */
|
|
|
enum { ACTIVE_STATUS = 33554432 }; /* active status */
|
|
|
enum { ENABLE_STATUS = 67108864 }; /* enable status */
|
|
|
enum { WAITING_CMD_STATUS = 134217728 }; /* waiting command status */
|
|
|
enum { NO_OPERATION = 0 }; /* no operation */
|
|
|
enum { BIT_COPY = 2 }; /* bit copy */
|
|
|
enum { BIT_TEST = 3 }; /* bit test */
|
|
|
enum { MASK_TEST = 4 }; /* mask test */
|
|
|
enum { REGISTER_TEST = 20 }; /* register test */
|
|
|
enum { REGISTER_COMPARE = 21 }; /* register compare */
|
|
|
enum { SIMPLE_CLOCK = 40 }; /* simple clock */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* trigger table - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdTrigger {
|
|
|
public:
|
|
|
enum { HEADER = 0 }; /* header */
|
|
|
enum { OUT_MASK = 1 }; /* output mask */
|
|
|
enum { SW_MASK = 2 }; /* status mask */
|
|
|
enum { POSITION = 3 }; /* position */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* trigger header - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdTriggerHeader {
|
|
|
public:
|
|
|
enum { TYPE_MASK = 255 }; /* trigger type */
|
|
|
enum { ACTION_MASK = 16711680 }; /* trigger action */
|
|
|
enum { NO_OPERATION = 0 }; /* no operation */
|
|
|
enum { DISABLED = 128 }; /* disabled */
|
|
|
enum { POSITIVE = 129 }; /* positive */
|
|
|
enum { NEGATIVE = 130 }; /* negative */
|
|
|
enum { BIDIRECTIONAL = 131 }; /* bidirectional */
|
|
|
enum { SET_OUT_SW = 65536 }; /* set output and user sw */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* trace buffer - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdTrace {
|
|
|
public:
|
|
|
enum { BUFFER_0 = 0 }; /* buffer 0 */
|
|
|
enum { BUFFER_1 = 1 }; /* buffer 1 */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* hall lookup table - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdHallLkt {
|
|
|
public:
|
|
|
enum { LKT_0 = 0 }; /* lookup table 0 */
|
|
|
enum { LKT_1 = 1 }; /* lookup table 1 */
|
|
|
enum { LKT_2 = 2 }; /* lookup table 2 */
|
|
|
enum { LKT_3 = 3 }; /* lookup table 3 */
|
|
|
enum { LKT_4 = 4 }; /* lookup table 4 */
|
|
|
enum { LKT_5 = 5 }; /* lookup table 5 */
|
|
|
enum { LKT_6 = 6 }; /* lookup table 6 */
|
|
|
enum { LKT_7 = 7 }; /* lookup table 7 */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* interrupt edge - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdInterruptEdge {
|
|
|
public:
|
|
|
enum { POSITIVE = 0 }; /* positive */
|
|
|
enum { NEGATIVE = 1 }; /* negative */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* test mode - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdTestMode {
|
|
|
public:
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* Dmd Commands Numbers - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdCommands {
|
|
|
/*
|
|
|
* public constants
|
|
|
*/
|
|
|
public:
|
|
|
enum { ACKNOWLEDGE_INTERRUPT = 118 }; /* acknowledge interrupt */
|
|
|
enum { ADD_ACC = 161 }; /* Adds accumulator */
|
|
|
enum { ADD_REGISTER = 91 }; /* Adds register */
|
|
|
enum { AND_ACC = 165 }; /* And accumulator */
|
|
|
enum { AND_NOT_ACC = 167 }; /* And not accumulator */
|
|
|
enum { AND_NOT_REGISTER = 97 }; /* AND NOT register */
|
|
|
enum { AND_REGISTER = 95 }; /* AND register */
|
|
|
enum { AUTO_CONFIG_CL = 150 }; /* Auto config current loop */
|
|
|
enum { CALL_SUBROUTINE = 68 }; /* Calls subroutine */
|
|
|
enum { CAN_COMMAND_1 = 250 }; /* Can command 1 */
|
|
|
enum { CAN_COMMAND_2 = 251 }; /* Can command 2 */
|
|
|
enum { CHANGE_AXIS = 109 }; /* Changes axis */
|
|
|
enum { CHANGE_POWER = 124 }; /* Changes power */
|
|
|
enum { CLEAR_CALL_STACK = 34 }; /* Clears called stack */
|
|
|
enum { CLEAR_PENDING_ERROR = 50 }; /* Clear pending error */
|
|
|
enum { CLEAR_PENDING_WARNING = 51 }; /* clear pending warning */
|
|
|
enum { CLEAR_TRIGGER_TABLE = 107 }; /* Clears trigger table */
|
|
|
enum { CLEAR_USER_VAR = 17 }; /* Clears all user registers */
|
|
|
enum { CONV_REGISTER = 122 }; /* Converts between int and float */
|
|
|
enum { DEFINE_EMPTY_TRIGGER = 108 }; /* define empty trigger */
|
|
|
enum { DEFINE_LABEL = 27 }; /* Defines a label */
|
|
|
enum { DEFINE_NEG_TRIGGER = 106 }; /* define negative trigger */
|
|
|
enum { DEFINE_POS_TRIGGER = 105 }; /* define positive trigger */
|
|
|
enum { DIVIDE_ACC = 163 }; /* Divides accumulator */
|
|
|
enum { DIVIDE_REGISTER = 94 }; /* Divides register */
|
|
|
enum { DRIVE_NEW = 78 }; /* Controller new */
|
|
|
enum { DRIVE_RESTORE = 49 }; /* Controller restore */
|
|
|
enum { DRIVE_SAVE = 48 }; /* Controller save */
|
|
|
enum { EDIT_SEQUENCE = 62 }; /* Edit sequence */
|
|
|
enum { ENABLE_RTI = 183 }; /* realtime enable when seq_on 0 */
|
|
|
enum { ENTER_DOWNLOAD = 42 }; /* Enter download mode */
|
|
|
enum { EXIT_SEQUENCE = 63 }; /* Exit sequence */
|
|
|
enum { FLOAT_COS = 223 }; /* Executes command cos */
|
|
|
enum { FLOAT_FRAC_PART = 225 }; /* Executes command frac_part */
|
|
|
enum { FLOAT_INT_PART = 226 }; /* Executes command int_part */
|
|
|
enum { FLOAT_INV = 221 }; /* Executes command inv */
|
|
|
enum { FLOAT_SIGN = 224 }; /* Executes command sign */
|
|
|
enum { FLOAT_SIN = 222 }; /* Executes command sin */
|
|
|
enum { FLOAT_SQRT = 220 }; /* Executes command sqrt */
|
|
|
enum { FLOAT_TEST = 227 }; /* Executes command test */
|
|
|
enum { HARDWARE_RESET = 600 }; /* Hardware reset */
|
|
|
enum { HOMING_START = 45 }; /* Homing start */
|
|
|
enum { HOMING_SYNCHRONISED = 41 }; /* Synchronized homing */
|
|
|
enum { IF_EQUAL = 151 }; /* Jumps if par1 equal XAC */
|
|
|
enum { IF_GREATER = 154 }; /* Jumps if par1 greater XAC */
|
|
|
enum { IF_GREATER_OR_EQUAL = 156 }; /* Jumps if par1 greater or equal XAC */
|
|
|
enum { IF_LOWER = 153 }; /* Jumps if par1 lower XAC */
|
|
|
enum { IF_LOWER_OR_EQUAL = 155 }; /* Jumps if par1 less or equal XAC */
|
|
|
enum { IF_NOT_EQUAL = 152 }; /* Jumps if par1 different XAC */
|
|
|
enum { INI_START = 44 }; /* Phasing start */
|
|
|
enum { INPUT_START_MVT = 33 }; /* Starts mvt on input */
|
|
|
enum { INVERT_REGISTER = 174 }; /* Inverts register */
|
|
|
enum { IPOL_ABS_COORDS = 556 }; /* Assigns the coordinates of the current position of the axes */
|
|
|
enum { IPOL_ABS_MODE = 555 }; /* Sets (1) or clears (0) the abs ref coordinates mode */
|
|
|
enum { IPOL_BEGIN = 553 }; /* Enter to interpolated mode */
|
|
|
enum { IPOL_BEGIN_CONCATENATION = 1030 }; /* Starts the concatenation */
|
|
|
enum { IPOL_CIRCLE_CCW_C2D = 1041 }; /* Adds circular segment to trajectory */
|
|
|
enum { IPOL_CIRCLE_CCW_R2D = 1027 }; /* Adds circular segment to trajectory */
|
|
|
enum { IPOL_CIRCLE_CW_C2D = 1040 }; /* Adds circular segment to trajectory */
|
|
|
enum { IPOL_CIRCLE_CW_R2D = 1026 }; /* Adds circular segment to trajectory */
|
|
|
enum { IPOL_CONTINUE = 654 }; /* Restarts interpolation after a quick stop */
|
|
|
enum { IPOL_DISABLE_UCONCATENATION = 1052 }; /* Forces to stop before the next universal line */
|
|
|
enum { IPOL_END = 554 }; /* Leave the interpolated mode */
|
|
|
enum { IPOL_END_CONCATENATION = 1031 }; /* Stops the concatenation */
|
|
|
enum { IPOL_LINE = 1025 }; /* Adds linear segment to trajectory */
|
|
|
enum { IPOL_LKT = 1032 }; /* Adds lkt segment to trajectory */
|
|
|
enum { IPOL_LOCK = 1044 }; /* Locks the trajectory execution */
|
|
|
enum { IPOL_MARK = 1039 }; /* Puts a mark in the trajectory */
|
|
|
enum { IPOL_MATRIX_ROTATE = 1056 }; /* Rotates the selected axis plane */
|
|
|
enum { IPOL_MATRIX_SCALE = 1055 }; /* Scales the selected axes */
|
|
|
enum { IPOL_MATRIX_SHEAR = 1057 }; /* Shears selected axes */
|
|
|
enum { IPOL_MATRIX_TRANSLATE = 1054 }; /* Translates the reference frame */
|
|
|
enum { IPOL_PT = 1045 }; /* Adds pt segment to trajectory */
|
|
|
enum { IPOL_PUSH = 1279 }; /* push parameters for ipol commands */
|
|
|
enum { IPOL_PVT = 1028 }; /* Adds pvt segment to trajectory */
|
|
|
enum { IPOL_PVT_UPDATE = 662 }; /* Updates registers for PVT trajectory */
|
|
|
enum { IPOL_RESET = 652 }; /* reset interpolation */
|
|
|
enum { IPOL_SET = 552 }; /* Sets the interpolation axis */
|
|
|
enum { IPOL_STOP_EMCY = 656 }; /* Stops interpolation emergency */
|
|
|
enum { IPOL_STOP_SMOOTH = 653 }; /* Stops interpolation smooth */
|
|
|
enum { IPOL_TAN_ACCELERATION = 1036 }; /* Adds acceleration modification to trajectory */
|
|
|
enum { IPOL_TAN_DECELERATION = 1037 }; /* Adds deceleration modification to trajectory */
|
|
|
enum { IPOL_TAN_JERK_TIME = 1038 }; /* Adds jerk time modification to trajectory */
|
|
|
enum { IPOL_TAN_VELOCITY = 1035 }; /* Adds speed modification to trajectory */
|
|
|
enum { IPOL_ULINE = 1033 }; /* Adds universal linear segment to trajectory */
|
|
|
enum { IPOL_UNLOCK = 655 }; /* Unlock the ipol buffer */
|
|
|
enum { IPOL_URELATIVE = 1051 }; /* Enables or disables relative mode */
|
|
|
enum { IPOL_USPEED = 1049 }; /* Changes speed for universal linear moves */
|
|
|
enum { IPOL_USPEED_AXISMASK = 1053 }; /* Changes the axis mask for tangential speed */
|
|
|
enum { IPOL_UTIME = 1050 }; /* Changes acceleration and jerk time for universal linear moves */
|
|
|
enum { IPOL_WAIT_TIME = 1029 }; /* Waits before continue the trajectory */
|
|
|
enum { JUMP_BIT_CLEAR = 37 }; /* Jump bit clear */
|
|
|
enum { JUMP_BIT_SET = 36 }; /* Jump bit set */
|
|
|
enum { JUMP_LABEL = 26 }; /* Jumps to label */
|
|
|
enum { MAPPING_ASP = 234 }; /* SET slot address for stage error mapping mode */
|
|
|
enum { MAPPING_MAM = 199 }; /* Set all involved axes mask and corrected axes mask */
|
|
|
enum { MAPPING_MCS = 200 }; /* Stage error mapping command, set the cyclic stroke of source axes */
|
|
|
enum { MAPPING_MCT = 193 }; /* Set config. and table nbr info for stage error mapping */
|
|
|
enum { MAPPING_MDA = 195 }; /* Set dimension and axes for stage error mapping */
|
|
|
enum { MAPPING_MDT = 192 }; /* Set date and time info for stage error mapping */
|
|
|
enum { MAPPING_MMO = 194 }; /* Set correction mode for stage error mapping */
|
|
|
enum { MAPPING_MSI = 190 }; /* Set string info for stage error mapping */
|
|
|
enum { MAPPING_MSR = 196 }; /* Set mapping source registers for stage error mapping */
|
|
|
enum { MAPPING_MSV = 191 }; /* Set version info for stage error mapping */
|
|
|
enum { MAPPING_MTP = 197 }; /* Set mapping origin for stage error mapping */
|
|
|
enum { MAPPING_MTU = 198 }; /* Set mapping unit factor for stage error mapping */
|
|
|
enum { MASTER_MODE = 143 }; /* master mode */
|
|
|
enum { MODULO_REGISTER = 101 }; /* Modulo register */
|
|
|
enum { MULTIPLY_ACC = 162 }; /* Multiplies accumulator */
|
|
|
enum { MULTIPLY_REGISTER = 93 }; /* Multiplies register */
|
|
|
enum { OR_ACC = 164 }; /* Or accumulator */
|
|
|
enum { OR_NOT_ACC = 166 }; /* Or not accumulator */
|
|
|
enum { OR_NOT_REGISTER = 98 }; /* OR NOT register */
|
|
|
enum { OR_REGISTER = 96 }; /* OR register */
|
|
|
enum { PROFILED_MOVE = 60 }; /* Start movement */
|
|
|
enum { PURGE = 190 }; /* purge */
|
|
|
enum { PUSH = 255 }; /* Push parameters */
|
|
|
enum { REALTIME_DISABLE = 176 }; /* Real-time disable */
|
|
|
enum { REALTIME_ENABLE = 175 }; /* Real-time enable */
|
|
|
enum { RELATIVE_PROFILED_MOVE = 62 }; /* Start relative movement */
|
|
|
enum { RESET_BUS = 87 }; /* reset bus */
|
|
|
enum { RESET_CONTROLLER = 88 }; /* Resets controller */
|
|
|
enum { RESET_DRIVE = 88 }; /* Resets controller */
|
|
|
enum { RESET_ERROR = 79 }; /* Resets error */
|
|
|
enum { RESET_TRIGGER = 104 }; /* reset trigger */
|
|
|
enum { SEARCH_LIMIT_STROKE = 46 }; /* Searches limit stroke */
|
|
|
enum { SET_DEBUG_TIMEOUT = 180 }; /* set debug timeout */
|
|
|
enum { SET_GROUP_MASK = 40 }; /* set group mask */
|
|
|
enum { SET_GUARD_TIMEOUT = 181 }; /* set guard timeout */
|
|
|
enum { SET_REGISTER = 123 }; /* Sets register */
|
|
|
enum { SET_REGISTER_DEPTH = 125 }; /* Set max all depths par1 with value par2 to parx */
|
|
|
enum { SET_USER_POSITION = 22 }; /* Sets user position */
|
|
|
enum { SET_VERSION = 20 }; /* Set version parameters */
|
|
|
enum { SHIFT_LEFT_ACC = 169 }; /* Shift left accumulator */
|
|
|
enum { SHIFT_LEFT_REGISTER = 173 }; /* Shift left register */
|
|
|
enum { SHIFT_RIGHT_ACC = 168 }; /* Shift right accumulator */
|
|
|
enum { SHIFT_RIGHT_REGISTER = 172 }; /* Shift right register */
|
|
|
enum { START_MVT = 25 }; /* Starts movement */
|
|
|
enum { STEP_ABSOLUTE = 129 }; /* Absolute step */
|
|
|
enum { STEP_NEGATIVE = 115 }; /* Negative step */
|
|
|
enum { STEP_POSITIVE = 114 }; /* Positive step */
|
|
|
enum { STOP_MOTOR_EMCY = 18 }; /* Emergency stop */
|
|
|
enum { STOP_MOTOR_SMOOTH = 70 }; /* Stops motor smoothly */
|
|
|
enum { STOP_SEQ_MOTOR_EMCY = 120 }; /* Stops seq motor emergency */
|
|
|
enum { STOP_SEQ_MOTOR_SMOOTH = 121 }; /* Stops seq motor smooth */
|
|
|
enum { STOP_SEQ_POWER_OFF = 119 }; /* Stops seq power off */
|
|
|
enum { STOP_SEQUENCE = 0 }; /* Stops sequence thread */
|
|
|
enum { SUBROUTINE_RETURN = 69 }; /* Subroutine return */
|
|
|
enum { SUBSTRACT_ACC = 160 }; /* Substracts accumulator */
|
|
|
enum { SUBSTRACT_REGISTER = 92 }; /* Substracts register */
|
|
|
enum { SYNCRO_START_MVT = 35 }; /* syncro start mvt */
|
|
|
enum { WAIT_AXIS_BUSY = 13 }; /* Waits for end of axis busy */
|
|
|
enum { WAIT_BIT_CLEAR = 54 }; /* Wait bit clear */
|
|
|
enum { WAIT_BIT_CLEAR_USER_CHANNEL_12 = 272 }; /* Set user status bit#12 during wait bit clear */
|
|
|
enum { WAIT_BIT_CLEAR_USER_CHANNEL_13 = 273 }; /* Set user status bit#13 during wait bit clear */
|
|
|
enum { WAIT_BIT_CLEAR_USER_CHANNEL_14 = 274 }; /* Set user status bit#14 during wait bit clear */
|
|
|
enum { WAIT_BIT_CLEAR_USER_CHANNEL_15 = 275 }; /* Set user status bit#15 during wait bit clear */
|
|
|
enum { WAIT_BIT_SET = 55 }; /* Wait bit set */
|
|
|
enum { WAIT_BIT_SET_USER_CHANNEL_12 = 276 }; /* Set user status bit#12 during wait bit set */
|
|
|
enum { WAIT_BIT_SET_USER_CHANNEL_13 = 277 }; /* Set user status bit#13 during wait bit set */
|
|
|
enum { WAIT_BIT_SET_USER_CHANNEL_14 = 278 }; /* Set user status bit#14 during wait bit set */
|
|
|
enum { WAIT_BIT_SET_USER_CHANNEL_15 = 279 }; /* Set user status bit#15 during wait bit set */
|
|
|
enum { WAIT_BUSY = 148 }; /* Wait busy */
|
|
|
enum { WAIT_GREATER = 53 }; /* Waits for greater */
|
|
|
enum { WAIT_GREATER_USER_CHANNEL_12 = 280 }; /* Set user status bit#12 during wait greater unsigned */
|
|
|
enum { WAIT_GREATER_USER_CHANNEL_13 = 281 }; /* Set user status bit#13 during wait greater unsigned */
|
|
|
enum { WAIT_GREATER_USER_CHANNEL_14 = 282 }; /* Set user status bit#14 during wait greater unsigned */
|
|
|
enum { WAIT_GREATER_USER_CHANNEL_15 = 283 }; /* Set user status bit#15 during wait greater unsigned */
|
|
|
enum { WAIT_IN_WINDOW = 11 }; /* Waits in window */
|
|
|
enum { WAIT_IN_WINDOW_USER_CHANNEL_12 = 308 }; /* Set user status bit#12 during wait in window */
|
|
|
enum { WAIT_IN_WINDOW_USER_CHANNEL_13 = 309 }; /* Set user status bit#13 during wait in window */
|
|
|
enum { WAIT_IN_WINDOW_USER_CHANNEL_14 = 310 }; /* Set user status bit#14 during wait in window */
|
|
|
enum { WAIT_IN_WINDOW_USER_CHANNEL_15 = 311 }; /* Set user status bit#15 during wait in window */
|
|
|
enum { WAIT_LOWER = 52 }; /* Waits for lower */
|
|
|
enum { WAIT_LOWER_USER_CHANNEL_12 = 284 }; /* Set user status bit#12 during wait lower unsigned */
|
|
|
enum { WAIT_LOWER_USER_CHANNEL_13 = 285 }; /* Set user status bit#13 during wait lower unsigned */
|
|
|
enum { WAIT_LOWER_USER_CHANNEL_14 = 286 }; /* Set user status bit#14 during wait lower unsigned */
|
|
|
enum { WAIT_LOWER_USER_CHANNEL_15 = 287 }; /* Set user status bit#15 during wait lower unsigned */
|
|
|
enum { WAIT_MARK = 513 }; /* wait until the movement reach a mark */
|
|
|
enum { WAIT_MARK_USER_CHANNEL_12 = 523 }; /* wait until the movement reach a mark */
|
|
|
enum { WAIT_MARK_USER_CHANNEL_13 = 524 }; /* wait until the movement reach a mark */
|
|
|
enum { WAIT_MARK_USER_CHANNEL_14 = 525 }; /* wait until the movement reach a mark */
|
|
|
enum { WAIT_MARK_USER_CHANNEL_15 = 526 }; /* wait until the movement reach a mark */
|
|
|
enum { WAIT_MOVEMENT = 8 }; /* Waits for movement */
|
|
|
enum { WAIT_MOVEMENT_USER_CHANNEL_12 = 296 }; /* Set user status bit#12 during wait for movement */
|
|
|
enum { WAIT_MOVEMENT_USER_CHANNEL_13 = 297 }; /* Set user status bit#13 during wait for movement */
|
|
|
enum { WAIT_MOVEMENT_USER_CHANNEL_14 = 298 }; /* Set user status bit#14 during wait for movement */
|
|
|
enum { WAIT_MOVEMENT_USER_CHANNEL_15 = 299 }; /* Set user status bit#15 during wait for movement */
|
|
|
enum { WAIT_POSITION = 9 }; /* Waits for position */
|
|
|
enum { WAIT_POSITION_USER_CHANNEL_12 = 300 }; /* Set user status bit#12 during wait for position */
|
|
|
enum { WAIT_POSITION_USER_CHANNEL_13 = 301 }; /* Set user status bit#13 during wait for position */
|
|
|
enum { WAIT_POSITION_USER_CHANNEL_14 = 302 }; /* Set user status bit#14 during wait for position */
|
|
|
enum { WAIT_POSITION_USER_CHANNEL_15 = 303 }; /* Set user status bit#15 during wait for position */
|
|
|
enum { WAIT_SGN_GREATER = 57 }; /* Waits for greater signed */
|
|
|
enum { WAIT_SGN_GREATER_USER_CHANNEL_12 = 288 }; /* Set user status bit#12 during wait greater signed */
|
|
|
enum { WAIT_SGN_GREATER_USER_CHANNEL_13 = 289 }; /* Set user status bit#13 during wait greater signed */
|
|
|
enum { WAIT_SGN_GREATER_USER_CHANNEL_14 = 290 }; /* Set user status bit#14 during wait greater signed */
|
|
|
enum { WAIT_SGN_GREATER_USER_CHANNEL_15 = 291 }; /* Set user status bit#15 during wait greater signed */
|
|
|
enum { WAIT_SGN_LOWER = 56 }; /* Waits for lower signed */
|
|
|
enum { WAIT_SGN_LOWER_USER_CHANNEL_12 = 292 }; /* Set user status bit#12 during wait lower signed */
|
|
|
enum { WAIT_SGN_LOWER_USER_CHANNEL_13 = 293 }; /* Set user status bit#13 during wait lower signed */
|
|
|
enum { WAIT_SGN_LOWER_USER_CHANNEL_14 = 294 }; /* Set user status bit#14 during wait lower signed */
|
|
|
enum { WAIT_SGN_LOWER_USER_CHANNEL_15 = 295 }; /* Set user status bit#15 during wait lower signed */
|
|
|
enum { WAIT_STATUS_BIT_CLEAR_CHANNEL_12 = 531 }; /* Wait status bit clear */
|
|
|
enum { WAIT_STATUS_BIT_CLEAR_CHANNEL_13 = 532 }; /* Wait status bit clear */
|
|
|
enum { WAIT_STATUS_BIT_CLEAR_CHANNEL_14 = 533 }; /* Wait status bit clear */
|
|
|
enum { WAIT_STATUS_BIT_CLEAR_CHANNEL_15 = 534 }; /* Wait status bit clear */
|
|
|
enum { WAIT_STATUS_BIT_SET_CHANNEL_12 = 527 }; /* Wait status bit set */
|
|
|
enum { WAIT_STATUS_BIT_SET_CHANNEL_13 = 528 }; /* Wait status bit set */
|
|
|
enum { WAIT_STATUS_BIT_SET_CHANNEL_14 = 529 }; /* Wait status bit set */
|
|
|
enum { WAIT_STATUS_BIT_SET_CHANNEL_15 = 530 }; /* Wait status bit set */
|
|
|
enum { WAIT_TH_SPEED = 12 }; /* wait theoretical speed */
|
|
|
enum { WAIT_TIME = 10 }; /* Waits for time */
|
|
|
enum { WAIT_TIME_USER_CHANNEL_12 = 304 }; /* Set user status bit#12 during wait for time */
|
|
|
enum { WAIT_TIME_USER_CHANNEL_13 = 305 }; /* Set user status bit#13 during wait for time */
|
|
|
enum { WAIT_TIME_USER_CHANNEL_14 = 306 }; /* Set user status bit#14 during wait for time */
|
|
|
enum { WAIT_TIME_USER_CHANNEL_15 = 307 }; /* Set user status bit#15 during wait for time */
|
|
|
enum { WAITING_REC_04 = 254 }; /* waiting record 04 */
|
|
|
enum { WAITING_REC_12 = 252 }; /* waiting record 12 */
|
|
|
enum { WAITING_REC_14 = 253 }; /* waiting record 14 */
|
|
|
enum { XOR_NOT_REGISTER = 100 }; /* XOR NOT register */
|
|
|
enum { XOR_REGISTER = 99 }; /* XOR register */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* Dmd Parameters Numbers - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdParameters {
|
|
|
/*
|
|
|
* public constants
|
|
|
*/
|
|
|
public:
|
|
|
enum { ANALOG_OUTPUT = 175 }; /* Analog output */
|
|
|
enum { ANR_MAX_POSITION = 219 }; /* Anr max position */
|
|
|
enum { ANR_MAX_VOLTAGE = 218 }; /* Anr max voltage */
|
|
|
enum { ANR_MIN_POSITION = 217 }; /* Anr min position */
|
|
|
enum { ANR_MIN_VOLTAGE = 216 }; /* Anr min voltage */
|
|
|
enum { APR_INPUT_FILTER = 24 }; /* Apr input filter */
|
|
|
enum { BRAKE_DECELERATION = 206 }; /* Brake deceleration */
|
|
|
enum { CAME_VALUE = 205 }; /* Came value */
|
|
|
enum { CL_ADC_BITS = 49 }; /* Current loop adc bits */
|
|
|
enum { CL_CURRENT_LIMIT = 83 }; /* Current loop overcurrent limit */
|
|
|
enum { CL_I2T_CURRENT_LIMIT = 84 }; /* I2 motor rms current limit */
|
|
|
enum { CL_I2T_TIME_LIMIT = 85 }; /* I2t motor integration limit */
|
|
|
enum { CL_INPUT_FILTER = 10 }; /* Current loop input filter */
|
|
|
enum { CL_INTEGRATOR_GAIN = 81 }; /* Current loop integrator gain */
|
|
|
enum { CL_OUTPUT_FILTER = 82 }; /* Current loop output filter */
|
|
|
enum { CL_PHASE_ADVANCE_FACTOR = 23 }; /* Commutation phase advance factor */
|
|
|
enum { CL_PHASE_ADVANCE_SHIFT = 25 }; /* Current loop phase advance shift */
|
|
|
enum { CL_PROPORTIONAL_GAIN = 80 }; /* Current loop proportional gain */
|
|
|
enum { CL_REGEN_MODE = 86 }; /* Current loop regeneration mode */
|
|
|
enum { CONCATENATED_MVT = 201 }; /* Concatenated movement */
|
|
|
enum { CTRL_GAIN = 224 }; /* External reference gain */
|
|
|
enum { CTRL_OFFSET = 223 }; /* External reference offset */
|
|
|
enum { CTRL_SHIFT_FACTOR = 222 }; /* Control source shift factor */
|
|
|
enum { CTRL_SOURCE_DEPTH = 222 }; /* External reference depth */
|
|
|
enum { CTRL_SOURCE_INDEX = 221 }; /* External reference index */
|
|
|
enum { CTRL_SOURCE_TYPE = 220 }; /* External reference type */
|
|
|
enum { CUSTOM_SETTINGS_VERSION = 245 }; /* Customer settings version */
|
|
|
enum { DIGITAL_OUTPUT = 171 }; /* Digital outputs */
|
|
|
enum { DISPLAY_MODE = 66 }; /* Display mode */
|
|
|
enum { DRIVE_CONTROL_MODE = 61 }; /* Position reference mode */
|
|
|
enum { DRIVE_FAST_SEQ_MODE = 63 }; /* Sequence fast execution mode */
|
|
|
enum { DRIVE_FUSE_CHECKING = 140 }; /* Drive fuse checking */
|
|
|
enum { DRIVE_NAME = 3 }; /* Controller name */
|
|
|
enum { DRIVE_PL_CYCLE_TIME = 88 }; /* Int pos ctrl 0=166,1=125,2=83us */
|
|
|
enum { DRIVE_SLS_MODE = 145 }; /* Searches limit stroke (SLS) mode */
|
|
|
enum { DRIVE_SP_FACTOR = 64 }; /* Drive SP calculator factor */
|
|
|
enum { EBL_BAUDRATE = 195 }; /* EBL baudrate */
|
|
|
enum { EBL_INTRA_FRAME_TIMEOUT = 196 }; /* EBL intra-frame timeout */
|
|
|
enum { ENABLE_INPUT_MODE = 33 }; /* Enables input mode */
|
|
|
enum { ENCODER_HALL_PHASE_ADJ = 86 }; /* Digital Hall sensor phase adjustment */
|
|
|
enum { ENCODER_INDEX_DISTANCE = 75 }; /* Distance between two indexes */
|
|
|
enum { ENCODER_INVERSION = 68 }; /* Encoder reading way inversion */
|
|
|
enum { ENCODER_IPOL_SHIFT = 77 }; /* Encoder interpolation shift value */
|
|
|
enum { ENCODER_MOTOR_RATIO = 51 }; /* Encoder motor ratio */
|
|
|
enum { ENCODER_MUL_SHIFT = 78 }; /* Encoder multiplication shift value */
|
|
|
enum { ENCODER_PERIOD = 241 }; /* Encoder period */
|
|
|
enum { ENCODER_PHASE_1_FACTOR = 72 }; /* Analog encoder sine factor */
|
|
|
enum { ENCODER_PHASE_1_OFFSET = 70 }; /* Analog encoder sine offset */
|
|
|
enum { ENCODER_PHASE_2_FACTOR = 73 }; /* Analog encoder cosine factor */
|
|
|
enum { ENCODER_PHASE_2_OFFSET = 71 }; /* Analog encoder cosine offset */
|
|
|
enum { ENCODER_PHASE_3_FACTOR = 76 }; /* Encoder phase 3 factor */
|
|
|
enum { ENCODER_PHASE_3_OFFSET = 74 }; /* Phase shift for analog HALL sensor */
|
|
|
enum { ENCODER_TURN_FACTOR = 55 }; /* Encoder position increment factor */
|
|
|
enum { ENCODER_TYPE = 79 }; /* Encoder type */
|
|
|
enum { END_VELOCITY = 215 }; /* End velocity */
|
|
|
enum { FAST_OUTPUT = 5 }; /* Fast outputs */
|
|
|
enum { FOLLOWING_ERROR_WINDOW = 30 }; /* Tracking error limit */
|
|
|
enum { GANTRY_TYPE = 245 }; /* Gantry level */
|
|
|
enum { HOME_OFFSET = 45 }; /* Offset on absolute position */
|
|
|
enum { HOMING_ACCELERATION = 42 }; /* Homing acceleration */
|
|
|
enum { HOMING_CURRENT_LIMIT = 44 }; /* Homing force limit for mech end stop detection */
|
|
|
enum { HOMING_FINE_TUNING_MODE = 52 }; /* Homing fine tuning mode */
|
|
|
enum { HOMING_FINE_TUNING_VALUE = 53 }; /* Homing fine tuning value */
|
|
|
enum { HOMING_FIXED_MVT = 46 }; /* Homing movement stroke */
|
|
|
enum { HOMING_FOLLOWING_LIMIT = 43 }; /* Homing track limit for mech end stop detection */
|
|
|
enum { HOMING_INDEX_MVT = 48 }; /* Mvt to go out of idx/home switch */
|
|
|
enum { HOMING_METHOD = 40 }; /* Homing mode */
|
|
|
enum { HOMING_SWITCH_MVT = 47 }; /* Mvt to go out of limit switch or mech end stop */
|
|
|
enum { HOMING_ZERO_SPEED = 41 }; /* Homing speed */
|
|
|
enum { INDIRECT_AXIS_NUMBER = 197 }; /* Indirect axis number */
|
|
|
enum { INDIRECT_REGISTER_IDX = 198 }; /* Indirect register index */
|
|
|
enum { INDIRECT_REGISTER_SIDX = 199 }; /* Indirect register subindex */
|
|
|
enum { INIT_CURRENT_RATE = 95 }; /* Initialisation current rate */
|
|
|
enum { INIT_FINAL_PHASE = 93 }; /* Phasing final phase */
|
|
|
enum { INIT_INITIAL_PHASE = 97 }; /* Phasing initial phase */
|
|
|
enum { INIT_MAX_CURRENT = 92 }; /* Phasing constant current level */
|
|
|
enum { INIT_MODE = 90 }; /* Phasing mode */
|
|
|
enum { INIT_PHASE_RATE = 96 }; /* Initialisation phase rate */
|
|
|
enum { INIT_PULSE_LEVEL = 91 }; /* Phasing pulse level */
|
|
|
enum { INIT_TIME = 94 }; /* Phasing time (K90 = 2) */
|
|
|
enum { INIT_VOLTAGE_RATE = 98 }; /* Phasing voltage rate */
|
|
|
enum { INTERRUPT_MASK_1 = 180 }; /* Interrupt mask 1 */
|
|
|
enum { INTERRUPT_MASK_2 = 181 }; /* Interrupt mask 2 */
|
|
|
enum { IO_ERROR_EVENT_MASK = 37 }; /* DOUT mask error event */
|
|
|
enum { IPOL_CAME_VALUE = 717 }; /* Interpolation, came value */
|
|
|
enum { IPOL_LKT_CYCLIC_MODE = 710 }; /* Interpolation, LKT, cyclic mode */
|
|
|
enum { IPOL_LKT_RELATIVE_MODE = 711 }; /* Interpolation, LKT, relative mode */
|
|
|
enum { IPOL_LKT_SPEED_RATIO = 700 }; /* Interpolation, LKT, speed ratio of the pointer */
|
|
|
enum { IPOL_VELOCITY_RATE = 530 }; /* Interpolation, speed rate */
|
|
|
enum { JERK_FILTER_TIME = 213 }; /* Jerk time */
|
|
|
enum { MAX_ACCELERATION = 29 }; /* Max acceleration */
|
|
|
enum { MAX_POSITION_RANGE_LIMIT = 27 }; /* Max position range limit */
|
|
|
enum { MAX_PROFILE_VELOCITY = 28 }; /* Max profile velocity */
|
|
|
enum { MAX_SOFT_POSITION_LIMIT = 35 }; /* Max software position limit */
|
|
|
enum { MEASURE_DRIVE_CL_INT = 234 }; /* Timing measurement for current interrupt */
|
|
|
enum { MEASURE_DRIVE_PL_INT = 235 }; /* Timing measurement for slow interrupt */
|
|
|
enum { MEASURE_DRIVE_SP_INT = 236 }; /* Timing measurement for fast interrupt */
|
|
|
enum { MIN_POSITION_RANGE_LIMIT = 26 }; /* Min position range limit */
|
|
|
enum { MIN_SOFT_POSITION_LIMIT = 34 }; /* Min software position limit */
|
|
|
enum { MON_DEST_INDEX = 153 }; /* Monitoring destination index */
|
|
|
enum { MON_DEST_TYPE = 152 }; /* Monitoring destination type */
|
|
|
enum { MON_GAIN = 155 }; /* Optional board source register gain */
|
|
|
enum { MON_OFFSET = 154 }; /* Optional board source register offset */
|
|
|
enum { MON_SOURCE_AXIS = 158 }; /* Optional board source register selection */
|
|
|
enum { MON_SOURCE_INDEX = 31 }; /* XAOUT source register index */
|
|
|
enum { MON_SOURCE_TYPE = 30 }; /* XAOUT source register type */
|
|
|
enum { MOTION_AND_CONSIGNE = 78 }; /* Regulator type */
|
|
|
enum { MOTOR_DIV_FACTOR = 243 }; /* Position division factor */
|
|
|
enum { MOTOR_KT_FACTOR = 239 }; /* Motor Kt factor */
|
|
|
enum { MOTOR_MUL_FACTOR = 242 }; /* Position multiplication factor */
|
|
|
enum { MOTOR_PHASE_CORRECTION = 56 }; /* Motor phase correction */
|
|
|
enum { MOTOR_PHASE_NB = 89 }; /* Motor phase number and PWM frequency */
|
|
|
enum { MOTOR_POLE_NB = 54 }; /* Motor pair pole number */
|
|
|
enum { MOTOR_TEMP_CHECKING = 141 }; /* Enables motor temperature checking */
|
|
|
enum { MOTOR_TYPE = 240 }; /* Movement type conversion */
|
|
|
enum { MVT_DIRECTION = 209 }; /* Rotary movement type */
|
|
|
enum { MVT_LKT_AMPLITUDE = 208 }; /* Max stroke for LKT */
|
|
|
enum { MVT_LKT_NUMBER = 203 }; /* LKT number movement */
|
|
|
enum { MVT_LKT_TIME = 204 }; /* Movement LKT time */
|
|
|
enum { MVT_LKT_TYPE = 207 }; /* LKT mode selection */
|
|
|
enum { PDR_STEP_VALUE = 69 }; /* TTL encoder interpolation shift value */
|
|
|
enum { PL_ACC_FEEDFORWARD_GAIN = 21 }; /* Position loop acceleration ffwd gain */
|
|
|
enum { PL_ACC_FEEDFORWARD_GAIN_PD = 18 }; /* Acceleration ffwd in pulse/dir mode */
|
|
|
enum { PL_ANTI_WINDUP_GAIN = 5 }; /* Position loop anti-windup gain */
|
|
|
enum { PL_FORCE_FEEDBACK_GAIN_1 = 3 }; /* Position loop force feedback gain 1 */
|
|
|
enum { PL_FORCE_FEEDBACK_GAIN_2 = 13 }; /* Position loop force feedback gain 2 */
|
|
|
enum { PL_INTEGRATOR_GAIN = 4 }; /* Position loop integrator gain */
|
|
|
enum { PL_INTEGRATOR_LIMITATION = 6 }; /* Position loop integrator limitation */
|
|
|
enum { PL_INTEGRATOR_MODE = 7 }; /* Position loop integrator mode */
|
|
|
enum { PL_OUTPUT_FILTER = 9 }; /* Position loop output filter */
|
|
|
enum { PL_PROPORTIONAL_GAIN = 1 }; /* Position loop proportional gain */
|
|
|
enum { PL_SPEED_FEEDBACK_GAIN = 2 }; /* Position loop speed feedback gain */
|
|
|
enum { PL_SPEED_FEEDFWD_GAIN = 20 }; /* Position loop speed ffwd gain */
|
|
|
enum { PL_SPEED_FEEDFWD_GAIN_PD = 17 }; /* Speed ffwd in pulse/dir mode */
|
|
|
enum { PL_SPEED_FILTER = 8 }; /* Position loop speed filter */
|
|
|
enum { PL_SPEED_FILTER_2 = 12 }; /* Speed filter 2 */
|
|
|
enum { POSITION_WINDOW = 39 }; /* In-window position */
|
|
|
enum { POSITION_WINDOW_TIME = 38 }; /* In-window time */
|
|
|
enum { PROFILE_ACCELERATION = 212 }; /* Absolute max acc/deceleration */
|
|
|
enum { PROFILE_DECELERATION = 214 }; /* Profile deceleration */
|
|
|
enum { PROFILE_LIMIT_MODE = 36 }; /* Enables position limit (KL34, KL35) */
|
|
|
enum { PROFILE_MUL_SHIFT = 50 }; /* Profile multiplication shift */
|
|
|
enum { PROFILE_TYPE = 202 }; /* Movement type */
|
|
|
enum { PROFILE_VELOCITY = 211 }; /* Absolute max speed */
|
|
|
enum { REALTIME_ENABLED_GLOBAL = 190 }; /* RTI global enable */
|
|
|
enum { REALTIME_ENABLED_MASK = 192 }; /* RTI enabled mask */
|
|
|
enum { REALTIME_PENDING_MASK = 193 }; /* RTI pending mask */
|
|
|
enum { REALTIME_VALID_MASK = 191 }; /* RTI valid mask */
|
|
|
enum { REFERENCE_MODE = 61 }; /* Reference mode */
|
|
|
enum { SOFTWARE_CURRENT_LIMIT = 60 }; /* Software force limit */
|
|
|
enum { SWITCH_LIMIT_MODE = 32 }; /* Limit switch and home switch inversion */
|
|
|
enum { SYNCRO_INPUT_MASK = 160 }; /* Syncro input mask */
|
|
|
enum { SYNCRO_INPUT_VALUE = 161 }; /* Syncro input value */
|
|
|
enum { SYNCRO_OUTPUT_MASK = 162 }; /* Syncro output mask */
|
|
|
enum { SYNCRO_OUTPUT_VALUE = 163 }; /* Syncro output value */
|
|
|
enum { SYNCRO_START_TIMEOUT = 164 }; /* Synchro timeout */
|
|
|
enum { TARGET_POSITION = 210 }; /* Target position */
|
|
|
enum { TRIGGER_IO_MASK = 185 }; /* Trigger digital output mask */
|
|
|
enum { TRIGGER_IRQ_MASK = 184 }; /* User status mask for trigger */
|
|
|
enum { TRIGGER_MAP_OFFSET = 186 }; /* Trigger mapping number */
|
|
|
enum { TRIGGER_MAP_SIZE = 187 }; /* Trigger mapping size */
|
|
|
enum { TTL_SPECIAL_FILTER = 11 }; /* TTL special filter */
|
|
|
enum { UFAI_TEN_POWER = 525 }; /* Ufai ten power */
|
|
|
enum { UFPI_MUL_FACTOR = 522 }; /* Ufpi multiplication factor */
|
|
|
enum { UFPI_TEN_POWER = 523 }; /* Ufpi ten power */
|
|
|
enum { UFSI_TEN_POWER = 524 }; /* Ufsi ten power */
|
|
|
enum { UFTI_TEN_POWER = 526 }; /* Ufti ten power */
|
|
|
enum { USER_STATUS = 177 }; /* User status */
|
|
|
enum { VELOCITY_ERROR_LIMIT = 31 }; /* Speed error limit */
|
|
|
enum { X_ANALOG_GAIN = 157 }; /* Optional board analog gain */
|
|
|
enum { X_ANALOG_OFFSET = 156 }; /* Optional board analog offset */
|
|
|
enum { X_ANALOG_OUTPUT_1 = 7 }; /* Optional board analog outputs */
|
|
|
enum { X_ANALOG_OUTPUT_2 = 174 }; /* Optional board analog outputs 2 */
|
|
|
enum { X_DIGITAL_OUTPUT = 6 }; /* Optional board digital outputs */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* Dmd Monitoring Numbers - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdMonitoring {
|
|
|
/*
|
|
|
* public constants
|
|
|
*/
|
|
|
public:
|
|
|
enum { ACC_ACTUAL_VALUE = 15 }; /* Real acceleration (dai) */
|
|
|
enum { ACC_DEMAND_VALUE = 14 }; /* Theoretical acceleration (dai) */
|
|
|
enum { ACK_DRIVE_STATUS_1 = 162 }; /* Acknowledge drive status 1 */
|
|
|
enum { ACK_DRIVE_STATUS_2 = 163 }; /* Acknowledge drive status 2 */
|
|
|
enum { ANALOG_INPUT = 51 }; /* Analog input */
|
|
|
enum { ANALOG_INPUT_AUX = 52 }; /* Analog input auxiliary */
|
|
|
enum { AUX_ENCODER_1VPTP_VALUE = 133 }; /* Analog auxiliary encoder sine^2 + cosine^2 */
|
|
|
enum { AUX_ENCODER_COSINE_SIGNAL = 131 }; /* Analog auxiliary encoder cosine signal */
|
|
|
enum { AUX_ENCODER_INDEX_SIGNAL = 132 }; /* Analog auxiliary encoder index signal */
|
|
|
enum { AUX_ENCODER_SINE_SIGNAL = 130 }; /* Analog auxiliary encoder sine signal */
|
|
|
enum { AUXILIARY_ENCODER_LIMIT_SWITCH = 134 }; /* Auxiliary encoder limit switch */
|
|
|
enum { AXIS_NUMBER = 87 }; /* Axis number */
|
|
|
enum { CAN_FEEDBACK_1 = 250 }; /* Optional board feedback 1 */
|
|
|
enum { CAN_FEEDBACK_2 = 251 }; /* Optional board feedback 2 */
|
|
|
enum { CL_ACTUAL_VALUE = 31 }; /* Real force Iq measured */
|
|
|
enum { CL_CURRENT_PHASE_1 = 20 }; /* Real current in phase 1 */
|
|
|
enum { CL_CURRENT_PHASE_2 = 21 }; /* Real current in phase 2 */
|
|
|
enum { CL_CURRENT_PHASE_3 = 22 }; /* Real current in phase 3 */
|
|
|
enum { CL_DEMAND_VALUE = 30 }; /* Theoretical force Iq for current loop */
|
|
|
enum { CL_I2T_VALUE = 67 }; /* I2t motor current value */
|
|
|
enum { CL_LKT_PHASE_1 = 25 }; /* Current loop LKT phase 1 */
|
|
|
enum { CL_LKT_PHASE_2 = 26 }; /* Current loop LKT phase 2 */
|
|
|
enum { CL_LKT_PHASE_3 = 27 }; /* Current loop LKT phase 3 */
|
|
|
enum { CL_LKT_PHASES = 25 }; /* Phase angle */
|
|
|
enum { COMMON_FAST_INPUTS = 52 }; /* Common fast inputs */
|
|
|
enum { DAISY_CHAIN_NUMBER = 88 }; /* Daisy chain number */
|
|
|
enum { DIGITAL_INPUT = 50 }; /* Digital inputs */
|
|
|
enum { DIGITAL_OUTPUT_ACTUAL = 171 }; /* Digital outputs */
|
|
|
enum { DRIVE_CL_INT_ACTUAL_TIME = 190 }; /* Actual time of process on current loop */
|
|
|
enum { DRIVE_CL_INT_MAX_TIME = 192 }; /* Min time of process on current loop */
|
|
|
enum { DRIVE_CL_INT_MIN_TIME = 191 }; /* Max time of process on current loop */
|
|
|
enum { DRIVE_CL_TIME_FACTOR = 243 }; /* Controller current loop time factor */
|
|
|
enum { DRIVE_CONTROL_MODE_BF = 19 }; /* Control mode bit-field */
|
|
|
enum { DRIVE_DISPLAY = 95 }; /* Display's string */
|
|
|
enum { DRIVE_FUSE_STATUS = 140 }; /* Drive fuse status */
|
|
|
enum { DRIVE_MASK_VALUE = 93 }; /* Drive mask value */
|
|
|
enum { DRIVE_MAX_CURRENT = 82 }; /* Controller max current */
|
|
|
enum { DRIVE_PENDING_BPT = 98 }; /* Pending breakpoints */
|
|
|
enum { DRIVE_PL_INT_ACTUAL_TIME = 193 }; /* Actual time of process on position loop */
|
|
|
enum { DRIVE_PL_INT_MAX_TIME = 195 }; /* Min time of process on position loop */
|
|
|
enum { DRIVE_PL_INT_MIN_TIME = 194 }; /* Max time of process on position loop */
|
|
|
enum { DRIVE_PL_TIME_FACTOR = 244 }; /* Controller position loop time factor */
|
|
|
enum { DRIVE_QUARTZ_FREQUENCY = 242 }; /* Controller quartz frequency [Hz] */
|
|
|
enum { DRIVE_SEQUENCE_LINE = 96 }; /* Current instruction address */
|
|
|
enum { DRIVE_SEQUENCE_USAGE = 97 }; /* Drive sequence buffer usage */
|
|
|
enum { DRIVE_SP_INT_ACTUAL_TIME = 196 }; /* Actual time of process on manager loop */
|
|
|
enum { DRIVE_SP_INT_MAX_TIME = 198 }; /* Min time of process on manager loop */
|
|
|
enum { DRIVE_SP_INT_MIN_TIME = 197 }; /* Max time of process on manager loop */
|
|
|
enum { DRIVE_SP_TIME_FACTOR = 245 }; /* Controller manager loop time factor */
|
|
|
enum { DRIVE_STATUS_1 = 60 }; /* Controller status 1 */
|
|
|
enum { DRIVE_STATUS_2 = 61 }; /* Controller status 2 */
|
|
|
enum { DRIVE_TEMPERATURE = 90 }; /* Controller temperature */
|
|
|
enum { EB_RUNNING = 89 }; /* Etel-bus running */
|
|
|
enum { ENC_COS_SIG_OTHER_AXIS = 233 }; /* Analog encoder cosine signal of the other axis */
|
|
|
enum { ENCODER_1VPTP_VALUE = 43 }; /* Analog encoder sine^2 + cosine^2 */
|
|
|
enum { ENCODER_COSINE_SIGNAL = 41 }; /* Analog encoder cosine signal */
|
|
|
enum { ENCODER_HALL_1_SIGNAL = 45 }; /* Encoder HALL analog signal 1 */
|
|
|
enum { ENCODER_HALL_2_SIGNAL = 46 }; /* Encoder HALL analog signal 2 */
|
|
|
enum { ENCODER_HALL_3_SIGNAL = 47 }; /* Encoder HALL analog signal 3 */
|
|
|
enum { ENCODER_HALL_DIG_SIGNAL = 48 }; /* Digital HALL effect sensor */
|
|
|
enum { ENCODER_INDEX_SIGNAL = 42 }; /* Analog encoder index signal */
|
|
|
enum { ENCODER_IPOL_FACTOR = 241 }; /* Encoder interpolation factor */
|
|
|
enum { ENCODER_LIMIT_SWITCH = 44 }; /* Encoder limit switch */
|
|
|
enum { ENCODER_SINE_SIGNAL = 40 }; /* Analog encoder sine signal */
|
|
|
enum { ERROR_CODE = 64 }; /* Error code */
|
|
|
enum { FDOUT_ACTUAL = 172 }; /* Fast digital outputs */
|
|
|
enum { HOMING_STATUS = 159 }; /* Homing status */
|
|
|
enum { INDIRECT_AXIS_MASK = 94 }; /* Drive mask for generic command */
|
|
|
enum { INFO_BOOT_REVISION = 71 }; /* Boot version */
|
|
|
enum { INFO_C_SOFT_BUILD_TIME = 74 }; /* Firmware build time */
|
|
|
enum { INFO_P_SOFT_BUILD_TIME = 75 }; /* FPGA build time */
|
|
|
enum { INFO_PRODUCT_NUMBER = 70 }; /* Product type */
|
|
|
enum { INFO_PRODUCT_STRING = 85 }; /* Article number */
|
|
|
enum { INFO_SERIAL_NUMBER = 73 }; /* Serial number */
|
|
|
enum { INFO_SOFT_VERSION = 72 }; /* Firmware version */
|
|
|
enum { IRQ_DRIVE_STATUS_1 = 160 }; /* Interrupt drive status 1 */
|
|
|
enum { IRQ_DRIVE_STATUS_2 = 161 }; /* Interrupt drive status 2 */
|
|
|
enum { IRQ_PENDING_AXIS_MASK = 164 }; /* Interrupt pending axes mask */
|
|
|
enum { MAX_SLS_POSITION_LIMIT = 37 }; /* Superior position after SLS cmd */
|
|
|
enum { MIN_SLS_POSITION_LIMIT = 36 }; /* Inferior position after SLS cmd */
|
|
|
enum { PDR_ACC_DEMAND_VALUE = 35 }; /* Theo.acceleration (pulse/dir) */
|
|
|
enum { PDR_POSITION_VALUE = 17 }; /* Reference value for mode k61=0,1,4,36 */
|
|
|
enum { PDR_VELOCITY_DEMAND_VALUE = 34 }; /* Theoretical speed (pulse/dir) */
|
|
|
enum { POSITION_ACTUAL_VALUE_DS = 1 }; /* Real position with mapping (dpi) */
|
|
|
enum { POSITION_ACTUAL_VALUE_US = 7 }; /* Real position */
|
|
|
enum { POSITION_CTRL_ERROR = 2 }; /* Tracking error */
|
|
|
enum { POSITION_DEMAND_VALUE_DS = 0 }; /* Theoretical position (dpi) */
|
|
|
enum { POSITION_DEMAND_VALUE_US = 6 }; /* Theoretical position */
|
|
|
enum { POSITION_MAX_ERROR = 3 }; /* Max tracking error */
|
|
|
enum { POWER_SUPPLY_STATUS = 68 }; /* Power Supply status */
|
|
|
enum { REF_DEMAND_VALUE = 18 }; /* Reference demand value */
|
|
|
enum { TEB_NODE_MASK = 512 }; /* Present nodes on TransnET */
|
|
|
enum { VELOCITY_ACTUAL_VALUE = 11 }; /* Real speed after adv filter (dsi) */
|
|
|
enum { VELOCITY_BEFORE_K8 = 111 }; /* Real speed before adv filter depth 0 (dsi) */
|
|
|
enum { VELOCITY_DEMAND_VALUE = 10 }; /* Theoretical speed after adv filter (dsi) */
|
|
|
enum { VELOCITY_SECONDARY_ACTUAL_VALUE = 19 }; /* Second encoder real velocity (dsi) */
|
|
|
enum { X_ANALOG_INPUT_1 = 56 }; /* Optional board analog inputs */
|
|
|
enum { X_ANALOG_INPUT_2 = 57 }; /* Optional board analog input 2 */
|
|
|
enum { X_DIGITAL_INPUT = 55 }; /* Optional board digital inputs */
|
|
|
enum { X_INFO_BOOT_REVISION = 77 }; /* Optional board boot version */
|
|
|
enum { X_INFO_PRODUCT_NUMBER = 76 }; /* Optional board product number */
|
|
|
enum { X_INFO_PRODUCT_STRING = 86 }; /* Optional board article number */
|
|
|
enum { X_INFO_SERIAL_NUMBER = 79 }; /* Optional board serial number */
|
|
|
enum { X_INFO_SOFT_BUILD_TIME = 80 }; /* Optional board firmware buildtime */
|
|
|
enum { X_INFO_SOFT_VERSION = 78 }; /* Optional board firmware version */
|
|
|
|
|
|
};
|
|
|
#endif /* DMD_OO_API */
|
|
|
|
|
|
/*------------------------------------------------------------------------------
|
|
|
* Dmd Convert Numbers - c++
|
|
|
*-----------------------------------------------------------------------------*/
|
|
|
#ifdef DMD_OO_API
|
|
|
class DmdConvert {
|
|
|
/*
|
|
|
* public constants
|
|
|
*/
|
|
|
public:
|
|
|
enum { AVI = 40 }; /* analog voltage increment 8192 correspond to -10V -8192 correspond to +10V */
|
|
|
enum { AVI12BIT = 47 }; /* analog voltage increment 2048 correspond to -10V -2048 correspond to +10V */
|
|
|
enum { AVI16BIT = 48 }; /* analog voltage increment 32767 correspond to -10V -32768 correspond to +10V */
|
|
|
enum { AVI16BITINV = 49 }; /* analog voltage increment 32767 correspond to 10V -32768 correspond to -10V */
|
|
|
enum { BIT0 = 50 }; /* 2<SUP>0</SUP> = 1 correspond to 1.0 */
|
|
|
enum { BIT10 = 60 }; /* 2<SUP>10</SUP> = 1024 correspond to 1.0 */
|
|
|
enum { BIT11 = 61 }; /* 2<SUP>11</SUP> = 2048 correspond to 1.0 */
|
|
|
enum { BIT11_ENCODER = 62 }; /* Analgog encoder signal amplitude in volt (11 bit) */
|
|
|
enum { BIT11P2 = 82 }; /* */
|
|
|
enum { BIT15 = 65 }; /* 2<SUP>15</SUP> = 32768 correspond to 1.0 */
|
|
|
enum { BIT15_ENCODER = 63 }; /* Analgog encoder signal amplitude in volt (15 bit) */
|
|
|
enum { BIT15P2 = 83 }; /* */
|
|
|
enum { BIT24 = 74 }; /* 2<SUP>24</SUP> = 256*65536 correspond to 1.0 */
|
|
|
enum { BIT31 = 81 }; /* 2<SUP>31</SUP> = 32768*65536 correspond to 1.0 */
|
|
|
enum { BIT5 = 55 }; /* 2<SUP>5</SUP> = 32 correspond to 1.0 */
|
|
|
enum { BIT8 = 58 }; /* 2<SUP>8</SUP> = 256 correspond to 1.0 */
|
|
|
enum { BIT9 = 59 }; /* 2<SUP>9</SUP> = 512 correspond to 1.0 */
|
|
|
enum { BOOL = 1 }; /* boolean value */
|
|
|
enum { C13 = 20 }; /* current 13bit range */
|
|
|
enum { C14 = 21 }; /* current 14bit range */
|
|
|
enum { C29 = 22 }; /* current 29bit range */
|
|
|
enum { CLTI = 32 }; /* current loop time increment (cti) */
|
|
|
enum { CTI = 32 }; /* current loop time increment (41us) */
|
|
|
enum { CTRL_CUR2 = 8 }; /* Controller i<SUP>2</SUP>t, dissipation value */
|
|
|
enum { CTRL_CUR2T = 14 }; /* Controller i<SUP>2</SUP>t, integration value */
|
|
|
enum { CUR = 24 }; /* current */
|
|
|
enum { CUR2 = 25 }; /* i<SUP>2</SUP>, dissipation value */
|
|
|
enum { CUR2T = 26 }; /* i<SUP>2</SUP>t, integration value */
|
|
|
enum { CUR2T_V2 = 19 }; /* i<SUP>2</SUP>t, integration value */
|
|
|
enum { DAI = 17 }; /* drive acceleration increment */
|
|
|
enum { DPI = 15 }; /* drive position increment */
|
|
|
enum { DPI2 = 18 }; /* drive position increment for secondary encoder */
|
|
|
enum { DSI = 16 }; /* drive speed increment */
|
|
|
enum { DWORD = 0 }; /* double word value without conversion */
|
|
|
enum { ENCOFF = 42 }; /* 11bit with 2048 offset */
|
|
|
enum { EXP10 = 33 }; /* ten power factor */
|
|
|
enum { FLOAT = 5 }; /* float value */
|
|
|
enum { FTI = 31 }; /* fast time increment (125us-166us) */
|
|
|
enum { HSTI = 34 }; /* half slow time increment */
|
|
|
enum { INT = 2 }; /* integer value without conversion */
|
|
|
enum { IP_ADDRESS = 13 }; /* ip address type */
|
|
|
enum { K1 = 90 }; /* pl prop gain, k(A/m) = k1 * Iref * dpi_factor / 2<SUP>29</SUP> */
|
|
|
enum { K10 = 100 }; /* 1st order filter in s. */
|
|
|
enum { K1031 = 125 }; /* per cent unit, 3133 correspond to 1.0 or 100% */
|
|
|
enum { K14 = 3 }; /* */
|
|
|
enum { K2 = 92 }; /* pl speed feedback gain, k(A/(m/s)) = k2 * Iref * dsi_factor / 2<SUP>29</SUP> */
|
|
|
enum { K20 = 103 }; /* speed feedback, sec unit (m/(m/s)), F = k20 / 2<SUP>16-k50</SUP> * dsi_factor / dpi_factor */
|
|
|
enum { K20_DSB = 102 }; /* speed feedback, sec unit (m/(m/s)), F = k20 / 2<SUP>16-k50</SUP> * dsi_factor / dpi_factor */
|
|
|
enum { K21 = 105 }; /* speed feedback, sec unit (m/(m/s<SUP>2</SUP>)), F = k20 / 2<SUP>24-k50</SUP> * dai_factor / dpi_factor */
|
|
|
enum { K21_DSB = 104 }; /* speed feedback, sec unit (m/(m/s<SUP>2</SUP>)), F = k20 / 2<SUP>24-k50</SUP> * dai_factor / dpi_factor */
|
|
|
enum { K23 = 106 }; /* commutation phase advance period/(period*second/m) */
|
|
|
enum { K23_ACCURET = 107 }; /* commutation phase advance period/(Volt*second/m) */
|
|
|
enum { K239 = 124 }; /* motor Kt factor in mN(m)/A, 1000 correspond to 1.0mN(m)/A */
|
|
|
enum { K4 = 94 }; /* pl integrator gain, k(A/(m*s)) = k1 * Iref * dpi_factor / 2<SUP>29</SUP> / pl_time */
|
|
|
enum { K5 = 96 }; /* anti-windup K[m/A]=K5*4096/(dpi_factor * Iref) */
|
|
|
enum { K75 = 108 }; /* encoder multiple index distance, 1/1024 * encoder perion unit */
|
|
|
enum { K8 = 3 }; /* */
|
|
|
enum { K80 = 110 }; /* cl prop gain delta[1/A] */
|
|
|
enum { K80_VHP = 109 }; /* cl prop gain delta[V/A] */
|
|
|
enum { K81 = 112 }; /* cl prop integrator delta[1/(A*s)] */
|
|
|
enum { K81_VHP = 111 }; /* cl prop gain delta[V/(A*s)] */
|
|
|
enum { K82 = 114 }; /* filter time, T = [cti] * (2<SUP>n</SUP>-1) */
|
|
|
enum { K9 = 98 }; /* 1st order filter in pl */
|
|
|
enum { K94 = 116 }; /* time in 2x current loop increment */
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enum { K95 = 118 }; /* current rate for k95 */
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enum { K96 = 120 }; /* phase rate for k96 */
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enum { KFLOAT = 6 }; /* float value for K parameters */
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enum { LONG = 3 }; /* long integer value without conversion */
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enum { M242 = 35 }; /* quartz frequency in Hz */
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enum { M29 = 7 }; /* per cent unit, 100% correspond to value of M229 */
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enum { M82 = 28 }; /* current limit in 10 mA unit, 100 correspond to 1.0A */
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enum { MLTI = 30 }; /* manager loop time increment (sti) */
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enum { MSEC = 88 }; /* milliseconds */
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enum { PER_100 = 122 }; /* per cent unit, 100 correspond to 1.0 */
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enum { PER_1000 = 123 }; /* per thousand unit */
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enum { PH11 = 44 }; /* 2<SUP>11</SUP> = 2048 correspond to 360<36> */
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enum { PH12 = 45 }; /* 2<SUP>12</SUP> = 4096 correspond to 360<36> */
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enum { PH28 = 46 }; /* 2<SUP>28</SUP> = 65536*4096 correspond to 360<36> */
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enum { PLTI = 31 }; /* position loop time increment (fti) */
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enum { POLE_FREQ = 27 }; /* filter pole frequency in Herz */
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enum { QZTIME = 36 }; /* interrupt time in sec = inc / m242 */
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enum { SPEC2F = 37 }; /* filter time, T = [fti] * (2<SUP>n</SUP>-1) */
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enum { STI = 30 }; /* slow time increment (500us-2ms) */
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enum { STRING = 4 }; /* packed string value */
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enum { TEMP = 38 }; /* 2<SUP>0</SUP> = 1 correspond to 1.0 */
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enum { TTI = 126 }; /* Minimum time base TransnET (25us) */
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enum { UAI = 12 }; /* acceleration, user acceleration increment */
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enum { UFAI = 87 }; /* user friendly acceleration increment */
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enum { UFPI = 85 }; /* user friendly position increment */
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enum { UFSI = 86 }; /* user friendly speed increment */
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enum { UFTI = 39 }; /* user friendly time increment */
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enum { UPI = 10 }; /* user position increment */
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enum { UPI2 = 9 }; /* user position increment dual encodeur mode */
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enum { USI = 11 }; /* user speed increment */
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enum { VOLT = 41 }; /* 2<SUP>0</SUP> = 1 correspond to 1.0 */
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enum { VOLT100 = 43 }; /* (2<SUP>0</SUP>)/100 = 1 correspond to 1.0 */
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|
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};
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#endif /* DMD_OO_API */
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|
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|
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/*------------------------------------------------------------------------------
|
|
|
* Dmd Family Numbers - c++
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|
|
*-----------------------------------------------------------------------------*/
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|
|
#ifdef DMD_OO_API
|
|
|
class DmdFamily {
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|
|
/*
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|
|
* public constants
|
|
|
*/
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|
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public:
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enum { UNDEFINED = 0 }; /* UNDEFINED family */
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enum { DSB = 1 }; /* DSB family */
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enum { DSC = 2 }; /* DSC family */
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enum { ACCURET = 3 }; /* ACCURET family */
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|
|
|
|
};
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#endif /* DMD_OO_API */
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|
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|
|
#endif /* _DMD20_H */
|